<Semi-(,onau.ctot ^P
20 STERN AVE.
SPRINGFIELD, NEW JERSEY 07081
U.S.A.
,
One.
TELEPHONE: (973) 376-2922
PAD SERIES
PICO AMPERE DIODES
(212)227-6005
FAX: (973) 376-8960
FEATURES
DIRECT REPLACEMENT FOR SILICONIX PAD SERIES
REVERSE BREAKDOWN VOLTAGE
REVERSE CAPACITANCE
ABSOLUTE MAXIMUM RATINGS
1
@ 25 °C (unless otherwise stated)
Maximum Temperatures
Storage Temperature
Operating Junction Temperature
Maximum Power Dissipation
Continuous Power Dissipation (PAD)
Continuous Power Dissipation (J/SSTPAD)
Maximum Currents
Forward Current (PAD)
Forward Current (J/SSTPAD)
50mA
10mA
A & Case
BV
R
> -30V
Crss ^ 2.0pF
PAD1,2,5
PAD50
-55to+150°C
-55tO+150°C
SOOmW
350mW
JPAD
SSTPAD
cm
J
COMMON ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated)
SYMBOL
CHARACTERISTIC
MIN
TYP
MAX
UNITS
CONDITIONS
I
R
=
-1UA
ALL PAD
BV
R
V
F
t-TSS
-45
-30
-35
0.8
1.5
0.8
2
pF
0.5
1.5
V
Reverse Breakdown
Voltage
Forward Voltage
Total Reverse Capacitance
ALL SSTPAD
ALL JPAD
PAD1.5
All Others
IF = 5mA
V
R
= -5V,
f=
1MHz
SPECIFIC ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated)
SYMBOL
CHARACTERISTIC
PAD1
PAD
-1
-2
-5
-10
-20
-50
-100
-5
-10
-20
-50
-100
-200
-500
-5
-10
-20
-50
pA
VR =
-20V
JPAD
SSTPAD
UNITS
CONDITIONS
PAD2
(SST/J)PAD5
(SST/J)PAD10
IR
Maximum Reverse
Leakage Current
(SST/J)PAD20
(SST/J)PAD50
(SST/J)PAD100
(SST/J)PAD200
(SST/J)PAD500
Derate 2mW/°C above 25°C
Derate 2.8mW/°C above 25°C
NJ Semi-Conductors reserves the right to change test conditions, parameter limits and package dimensions without
notice. Information furnished by NJ Semi-Conductors is believed to be both accurate and reliable at the time of going
to press. However, NJ Semi-Conductors assumes no responsibility for any errors or omissions discovered in its use.
NJ Semi-Conductors encourages customers to verify that datasheets are current before placing orders.
Quality Semi-Conductors
Figure 1. Operational Amplifier Protection
Input Differential Voltage limited to 0.8V (typ) by JPADs D-i and D
2
. Common
Mode Input voltage limited by JPADs D
3
and D
4
to ±15V.
Figure 2. Sample and Hold Circuit
Typical Sample and Hold circuit with clipping. JPAD diodes reduce offset
voltages fed capacitively from the JFET switch gate.
FIGURE 2
FIGURE 1
+V
JPAD20
O
I>
<
-V
+V
\
"\7
JPADS
D1
o
D2
2N4117A
D1] & 1[ D2
o 01
D3V
"t"
^
^-^^
~i
[ D4
CONTROL
SIGNAL
c
2N4393
R
V
OUT
+ 15V -15V
o
TO-72
Three Lead
0.195
DIA.
0.175
0.030
MAX.
TO-92
0.230
DIA.
0.209
0046
0060
SOT-23
3 LEADS
0.019 DIA.
0.016
0.100
0.500 VIIN.
0014
0070
DIMENSIONS IN
MILLIMETERS
45"
A
DMMilQNS
NMCtES
0.046
0.036
4
0.048
0.028
1.
2.
Absolute maximum ratings are limiting values above which serviceability may be impaired.
The PAD type number denotes its maximum reverse current value in pico amperes. Devices with I
R
values intermediate to those shown
are available upon request.
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its
use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Linear Integrated Systems.
Embedded System
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