LTC2242-10 datasheet, PDF - EEWORLD Datasheet

LTC2242-10

10-Bit, 250Msps ADC

FeaTures

n

DescripTion

The LTC

®

2242-10 is a 250Msps, sampling 10-bit A/D con-

verter designed for digitizing high frequency, wide dynamic

range signals. The LTC2240-10 is perfect for demanding

communications applications with AC performance that

includes 60.5dB SNR and 78dB SFDR. Ultralow jitter of

95fs

RMS

allows IF undersampling with excellent noise

performance.

DC specs include ±0.4LSB INL (typ), ±0.2LSB DNL (typ)

and no missing codes over temperature.

The digital outputs can be either differential LVDS, or

single-ended CMOS. There are three format options for

the CMOS outputs: a single bus running at the full data

rate or two demultiplexed buses running at half data rate

with either interleaved or simultaneous update. A separate

output power supply allows the CMOS output swing to

range from 0.5V to 2.625V.

The ENC

+

and ENC

–

inputs may be driven differentially or

single ended with a sine wave, PECL, LVDS, TTL, or CMOS

inputs. An optional clock duty cycle stabilizer allows high

performance over a wide range of clock duty cycles.

L,

LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

*LTC2220-1, LTC2220, LTC2221, LTC2230, LTC2231 are 3.3V parts.

n

Sample Rate: 250Msps

60.5dB SNR

78dB SFDR

1.2GHz Full Power Bandwidth S/H

Single 2.5V Supply

Low Power Dissipation: 740mW

LVDS, CMOS, or Demultiplexed CMOS Outputs

Selectable Input Ranges: ±0.5V or ±1V

No Missing Codes

Optional Clock Duty Cycle Stabilizer

Shutdown and Nap Modes

Data Ready Output Clock

Pin Compatible Family

250Msps: LTC2242-12 (12-Bit), LTC2242-10 (10-Bit)

210Msps: LTC2241-12 (12-Bit), LTC2241-10 (10-Bit)

170Msps: LTC2240-12 (12-Bit), LTC2240-10 (10-Bit)

185Msps: LTC2220-1 (12-Bit)*

170Msps: LTC2220 (12-Bit), LTC2230 (10-Bit)*

135Msps: LTC2221 (12-Bit), LTC2231 (10-Bit)*

64-Pin 9mm

×

9mm QFN Package

applicaTions

n

Wireless and Wired Broadband Communication

Cable Head-End Systems

Power Amplifier Linearization

Communications Test Equipment

Typical applicaTion

2.5V

V

DD

REFH

REFL

FLEXIBLE

REFERENCE

0.5V

TO 2.625V

OV

DD

D9

•

D0

85

80

75

SFDR (dBFS)

70

65

60

55

50

45

40

224210 TA01

SFDR vs Input Frequency

ANALOG

INPUT

+

–

INPUT

S/H

10-BIT

PIPELINED

ADC CORE

CORRECTION

LOGIC

OUTPUT

DRIVERS

CMOS

OR

LVDS

1V RANGE

2V RANGE

OGND

CLOCK/DUTY

CYCLE

CONTROL

0 100 200 300 400 500 600 700 800 900 1000

INPUT FREQUENCY (MHz)

224210 G11

ENCODE

INPUT

224210fd

1

LTC2242-10

absoluTe MaxiMuM raTings

OV

DD

= V

DD

(Notes 1, 2)

pin conFiguraTion

TOP VIEW

64 GND

63 V

DD

62 V

DD

61 GND

60 V

CM

59 SENSE

58 MODE

57 LVDS

56 OF

+

/OFA

55 OF

–

/DA9

54 D9

+

/DA8

53 D9

–

/DA7

52 D8

+

/DA6

51 D8

–

/DA5

50 OGND

49 OV

DD

A

IN+

1

A

IN+

2

A

IN–

3

A

IN–

4

REFHA 5

REFHA 6

REFLB 7

REFLB 8

REFHB 9

REFHB 10

REFLA 11

REFLA 12

V

DD

13

V

DD

14

V

DD

15

GND 16

65

48 D7

+

/DA4

47 D7

–

/DA3

46 D6

+

/DA2

45 D6

–

/DA1

44 D5

+

/DA0

43 D5

–

/DNC

42 OV

DD

41 OGND

40 D4

+

/DNC

39 D4

–

/CLKOUTA

38 D3

+

/CLKOUTB

37 D3

–

/OFB

36 CLKOUT

+

/DB9

35 CLKOUT

–

/DB8

34 OV

DD

33 OGND

UP PACKAGE

64-LEAD (9mm

×

9mm) PLASTIC QFN

EXPOSED PAD (PIN 65) IS GND, MUST BE SOLDERED TO PCB

T

JMAX

= 150°C,

θ

JA

= 20°C/W

Supply Voltage (V

DD

) ...............................................2.8V

Digital Output Ground Voltage (OGND) ........ –0.3V to 1V

Analog Input Voltage (Note 3) ...... –0.3V to (V

DD

+ 0.3V)

Digital Input Voltage..................... –0.3V to (V

DD

+ 0.3V)

Digital Output Voltage ................ –0.3V to (OV

DD

+ 0.3V)

Power Dissipation .............................................1500mW

Operating Temperature Range

LTC2242C-10 ........................................... 0°C to 70°C

LTC2242I-10.........................................–40°C to 85°C

Storage Temperature Range .................. –65°C to 150°C

orDer inForMaTion

LEAD FREE FINISH

LTC2242CUP-10#PBF

LTC2242IUP-10#PBF

LEAD BASED FINISH

LTC2242CUP-10#PBF

LTC2242IUP-10#PBF

TAPE AND REEL

LTC2242CUP-10#TRPBF

LTC2242IUP-10#TRPBF

TAPE AND REEL

LTC2242CUP-10#TR

LTC2242IUP-10#TR

PART MARKING*

LTC2242UP-10

PART MARKING*

LTC2242UP-10

PACKAGE DESCRIPTION

64-Lead (9mm × 9mm) Plastic QFN

PACKAGE DESCRIPTION

64-Lead (9mm × 9mm) Plastic QFN

TEMPERATURE RANGE

0°C to 70°C

–40°C to 85°C

TEMPERATURE RANGE

0°C to 70°C

–40°C to 85°C

Consult LTC Marketing for parts specified with wider operating temperature ranges. *Temperature grades are identified by a label on the shipping container.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

temperature range, otherwise specifications are at T

A

= 25°C. (Note 4)

PARAMETER

Resolution (No Missing Codes)

Integral Linearity Error

Differential Linearity Error

Offset Error

Gain Error

CONDITIONS

converTer characTerisTics

The

l

denotes the specifications which apply over the full operating

MIN

●

ENC

+

17

ENC

–

18

SHDN 19

OE

20

DNC 21

DNC 22

DNC/DB0 23

DNC/DB1 24

OGND 25

OV

DD

26

D0

–

/DB2 27

D0

+

/DB3 28

D1

–

/DB4 29

D1

+

/DB5 30

D2

–

/DB6 31

D2

+

/DB7 32

TYP

±0.4

±0.2

±5

±0.7

MAX

1

0.7

17

3.5

UNITS

Bits

LSB

mV

%FS

10

–1

–0.7

–17

–3.5

Differential Analog Input (Note 5)

Differential Analog Input

(Note 6)

External Reference

●

224210fd

2

LTC2242-10

temperature range, otherwise specifications are at T

A

= 25°C. (Note 4)

PARAMETER

Offset Drift

Full-Scale Drift

Transition Noise

Internal Reference

External Reference

SENSE = 1V

CONDITIONS

converTer characTerisTics

The

l

denotes the specifications which apply over the full operating

MIN

TYP

±10

±60

±45

0.18

MAX

UNITS

µV/C

ppm/C

LSB

RMS

analog inpuT

The

●

denotes the specifications which apply over the full operating temperature range, otherwise

specifications are at T

A

= 25°C. (Note 4)

SYMBOL

V

IN

V

IN, CM

I

IN

I

SENSE

I

MODE

I

LVDS

t

AP

t

JITTER

PARAMETER

Analog Input Range (A

IN+

– A

IN–

)

Analog Input Common Mode (A

IN+

+ A

IN–

)/2

Analog Input Leakage Current

SENSE Input Leakage

MODE Pin Pull-Down Current to GND

LVDS Pin Pull-Down Current to GND

Sample and Hold Acquisition Delay Time

Sample and Hold Acquisition Delay Time Jitter

Full Power Bandwidth

Figure 8 Test Circuit

CONDITIONS

2.375V < V

DD

< 2.625V (Note 7)

Differential Input (Note 7)

0 < A

IN+

, A

IN–

< V

DD

0V < SENSE < 1V

●

MIN

1.2

–1

TYP

±0.5 to ±1

1.25

MAX

1.3

1

UNITS

V

µA

ns

fs

RMS

MHz

7

0.4

95

1200

DynaMic accuracy

SYMBOL

SNR

PARAMETER

The

●

denotes the specifications which apply over the full operating temperature range,

otherwise specifications are at T

A

= 25°C. A

IN

= –1dBFS. (Note 4)

CONDITIONS

10MHz Input

70MHz Input

140MHz Input

240MHz Input

l

MIN

59.2

TYP

60.6

60.5

60.4

78

MAX

UNITS

dB

dBc

Signal-to-Noise Ratio (Note 10)

SFDR

Spurious Free Dynamic Range

2nd or 3rd Harmonic

(Note 11)

10MHz Input

70MHz Input

140MHz Input

240MHz Input

10MHz Input

70MHz Input

140MHz Input

240MHz Input

10MHz Input

70MHz Input

140MHz Input

240MHz Input

f

IN1

= 135MHz, f

IN2

= 140MHz

l

63

75

74

73

85

Spurious Free Dynamic Range

4th Harmonic or Higher

(Note 11)

71

85

60.4

S/(N+D)

Signal-to-Noise Plus

Distortion Ratio

(Note 12)

58.2

60.4

60.3

60.2

81

IMD

Intermodulation Distortion

224210fd

3

LTC2242-10

inTernal reFerence characTerisTics

PARAMETER

V

CM

Output Voltage

V

CM

Output Tempco

V

CM

Line Regulation

V

CM

Output Resistance

2.375V < V

DD

< 2.625V

–1mA < I

OUT

< 1mA

CONDITIONS

I

OUT

= 0

(Note 4)

MIN

1.225

TYP

1.25

±35

3

2

MAX

1.275

UNITS

V

ppm/°C

mV/V

Ω

DigiTal inpuTs anD DigiTal ouTpuTs

SYMBOL

V

ID

V

ICM

R

IN

C

IN

V

IH

V

IL

I

IN

C

IN

OV

DD

= 2.5V

C

OZ

I

SOURCE

I

SINK

V

OH

V

OL

OV

DD

= 1.8V

V

OH

V

OL

V

OD

V

OS

High Level Output Voltage

Low Level Output Voltage

Differential Output Voltage

Output Common Mode Voltage

I

O

= –500µA

I

O

= 500µA

Hi-Z Output Capacitance

Output Source Current

Output Sink Current

High Level Output Voltage

Low Level Output Voltage

OE

= High (Note 7)

V

OUT

= 0V

V

OUT

= 2.5V

I

O

= –10µA

I

O

= –500µA

I

O

= 10µA

I

O

= 500µA

PARAMETER

Differential Input Voltage

Common Mode Input Voltage

Input Resistance

Input Capacitance

High Level Input Voltage

Low Level Input Voltage

Input Current

Input Capacitance

(Note 7)

V

DD

= 2.5V

V

DD

= 2.5V

V

IN

= 0V to V

DD

(Note 7)

CONDITIONS

(Note 7)

ENCODE INPUTS (ENC

+

, ENC

–

)

The

●

denotes the specifications which apply over the

full operating temperature range, otherwise specifications are at T

A

= 25°C. (Note 4)

MIN

●

TYP

MAX

UNITS

V

0.2

1.2

1.5

4.8

2

2.0

Internally Set

Externally Set (Note 7)

V

kΩ

pF

V

LOGIC INPUTS (OE, SHDN)

●

1.7

0.7

–10

3

10

V

µA

pF

LOGIC OUTPUTS (CMOS MODE)

3

37

23

2.495

2.45

0.005

0.07

1.75

0.07

●

pF

mA

V

454

1.375

mV

V

LOGIC OUTPUTS (LVDS MODE)

100Ω Differential Load

247

1.125

350

1.250

224210fd

4

LTC2242-10

power requireMenTs

SYMBOL

V

DD

P

SLEEP

P

NAP

OV

DD

I

VDD

I

OVDD

P

DISS

OV

DD

I

VDD

P

DISS

PARAMETER

Analog Supply Voltage

Sleep Mode Power

Nap Mode Power

Output Supply Voltage

Analog Supply Current

Output Supply Current

Power Dissipation

Output Supply Voltage

Analog Supply Current

Power Dissipation

(Note 8)

(Note 7)

The

●

denotes the specifications which apply over the full operating temperature

range, otherwise specifications are at T

A

= 25°C. (Note 9)

CONDITIONS

(Note 8)

SHDN = High,

OE

= High, No CLK

SHDN = High,

OE

= Low, No CLK

(Note 8)

●

MIN

2.375

TYP

2.5

1

28

MAX

2.625

UNITS

V

mW

LVDS OUTPUT MODE

2.375

2.5

285

58

858

0.5

2.5

285

740

2.625

320

70

975

2.625

320

V

mA

mW

V

mA

mW

CMOS OUTPUT MODE

●

TiMing characTerisTics

SYMBOL

f

S

t

L

t

H

t

AP

t

OE

t

D

t

C

PARAMETER

Sampling Frequency

ENC Low Time (Note 7)

ENC High Time (Note 7)

Sample-and-Hold Aperture Delay

Output Enable Delay

ENC to DATA Delay

ENC to CLKOUT Delay

DATA to CLKOUT Skew

Rise Time

Fall Time

Pipeline Latency

CMOS OUTPUT MODE

t

D

t

C

Pipeline

Latency

ENC to DATA Delay

ENC to CLKOUT Delay

DATA to CLKOUT Skew

Full Rate CMOS

Demuxed Interleaved

Demuxed Simultaneous

The

●

denotes the specifications which apply over the full operating temperature

range, otherwise specifications are at T

A

= 25°C. (Note 4)

CONDITIONS

(Note 8)

Duty Cycle Stabilizer Off

Duty Cycle Stabilizer On

Duty Cycle Stabilizer Off

Duty Cycle Stabilizer On

●

MIN

1

1.9

1.5

1.9

1.5

TYP

2

0.4

MAX

250

500

UNITS

MHz

ns

(Note 7)

(t

C

– t

D

) (Note 7)

●

5

1

–0.6

1.7

0

0.5

5

10

2.8

0.6

ns

Cycles

LVDS OUTPUT MODE

●

(Note 7)

(t

C

– t

D

) (Note 7)

●

1

–0.6

1.7

0

5

5 and 6

2.8

0.6

ns

Cycles

224210fd

5

	LTC2242-10	LTC2242CUP-10	LTC2242IUP-10
Description	10-Bit, 250Msps ADC	10-Bit, 250Msps ADC	10-Bit, 250Msps ADC
Brand Name	-	Linear Technology	Linear Technology
Is it Rohs certified?	-	incompatible	incompatible
Maker	-	Linear ( ADI )	Linear ( ADI )
Parts packaging code	-	QFN	QFN
package instruction	-	HVQCCN,	HVQCCN,
Contacts	-	64	64
Manufacturer packaging code	-	UP	UP
Reach Compliance Code	-	not_compliant	_compli
ECCN code	-	3A991.C.1	3A991.C.1
Maximum analog input voltage	-	1 V	1 V
Minimum analog input voltage	-	-1 V	-1 V
Converter type	-	ADC, PROPRIETARY METHOD	ADC, PROPRIETARY METHOD
JESD-30 code	-	S-PQCC-N64	S-PQCC-N64
JESD-609 code	-	e0	e0
length	-	9 mm	9 mm
Maximum linear error (EL)	-	0.0977%	0.0977%
Humidity sensitivity level	-	1	1
Number of analog input channels	-	1	1
Number of digits	-	10	10
Number of functions	-	1	1
Number of terminals	-	64	64
Maximum operating temperature	-	70 °C	85 °C
Output bit code	-	OFFSET BINARY, 2\'S COMPLEMENT BINARY	OFFSET BINARY, 2\'S COMPLEMENT BINARY
Output format	-	PARALLEL, WORD	PARALLEL, WORD
Package body material	-	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	-	HVQCCN	HVQCCN
Package shape	-	SQUARE	SQUARE
Package form	-	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	-	235	235
Certification status	-	Not Qualified	Not Qualified
Sampling rate	-	250 MHz	250 MHz
Sample and hold/Track and hold	-	SAMPLE	SAMPLE
Maximum seat height	-	0.8 mm	0.8 mm
Nominal supply voltage	-	2.5 V	2.5 V
surface mount	-	YES	YES
technology	-	CMOS	CMOS
Temperature level	-	COMMERCIAL	INDUSTRIAL
Terminal surface	-	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	-	NO LEAD	NO LEAD
Terminal pitch	-	0.5 mm	0.5 mm
Terminal location	-	QUAD	QUAD
Maximum time at peak reflow temperature	-	20	20
width	-	9 mm	9 mm

LTC2242-10

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