DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ
PA672T
N-CHANNEL MOS FET ARRAY
FOR SWITCHING
The
µ
PA672T is a super-mini-mold device provided
with two MOS FET elements. It achieves high-density
mounting and saves mounting costs.
PACKAGE DIMENSIONS (in millimeters)
0.2
–0
+0.1
0.15
–0.05
+0.1
FEATURES
• Two MOS FET circuits in package the same size as
SC-70
• Automatic mounting supported
1.25 ±0.1
2.1 ±0.1
6
5
4
0 to 0.1
1
2
3
0.7
0.9 ±0.1
0.65
0.65
1.3
2.0 ±0.2
PIN CONNECTION
6
5
4
1
2
3
1. Source 1 (S1)
2. Gate 1 (G1)
3. Drain 2 (D2)
4. Source 2 (S2)
5. Gate 2 (G2)
6. Drain 1 (D1)
Marking: MA
ABSOLUTE MAXIMUM RATINGS (T
A
= 25 ˚C)
PARAMETER
Drain to Source Voltage
Gate to Source Voltage
Drain Current (DC)
Drain Current (pulse)
Total Power Dissipation
Channel Temperature
Storage Temperature
SYMBOL
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T
T
ch
T
stg
PW
≤
10 ms, Duty Cycle
≤
50 %
TEST CONDITIONS
RATINGS
50
±7.0
100
200
200 (Total)
150
–55 to +150
UNIT
V
V
mA
mA
mW
˚C
˚C
Document No. G11259EJ1V0DS00 (1st edition)
Date Published June 1996 P
Printed in Japan
©
1996
µ
PA672T
ELECTRICAL CHARACTERISTICS (T
A
= 25 ˚C)
PARAMETER
Drain Cut-off Current
Gate Leakage Current
Gate Cut-off Voltage
Forward Transfer Admittance
Drain to Source On-State Resistance
Drain to Source On-State Resistance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
SYMBOL
I
DSS
I
GSS
V
GS(off)
|y
fs
|
R
DS(on)1
R
DS(on)2
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
V
DD
= 3 V, I
D
= 20 mA, V
GS(on)
= 3 V,
R
G
= 10
Ω,
R
L
= 120
Ω
TEST CONDITIONS
V
DS
= 50 V, V
GS
= 0
V
GS
=
±7.0
V, V
DS
= 0
V
DS
= 3.0 V, I
D
= 1.0
µ
A
V
DS
= 3.0 V, I
D
= 10 mA
V
GS
= 2.5 V, I
D
= 10 mA
V
GS
= 4.0 V, I
D
= 10 mA
V
DS
= 3.0 V, V
GS
= 0, f = 1.0 MHz
0.7
20
20
15
6
8
1.2
9
50
20
40
40
20
1.0
MIN.
TYP.
MAX.
10
±5.0
1.5
UNIT
µ
A
µ
A
V
mS
Ω
Ω
pF
pF
pF
ns
ns
ns
ns
SWITCHING TIME MEASUREMENT CIRCUIT AND CONDITIONS
V
GS
DUT
R
L
Gate
voltage
waveform
10 %
V
GS(on)
90 %
0
V
DD
R
G
PG.
Drain
current
waveform
V
GS
0
τ
τ
= 1
µ
s
Duty Cycle
≤
1 %
0
10 %
I
D
90 %
90 %
I
D
10 %
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
2
µ
PA672T
TYPICAL CHARACTERISTICS (T
A
= 25 ˚C)
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
300
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
100
P
T
- Total Power Dissipation - mW
Free air
250
80
I
D
- Drain Current - mA
4.0 V
3.5 V
3.0 V
200
60
2.5 V
150
Pe
ro
ne
100
To
ta
l
un
it
40
50
20
V
GS
= 2.0 V
0
50
75
100
125
25
T
A
- Ambient Temperature - ˚C
150
0
1
2
3
4
V
DS
- Drain to Source Voltage - V
5
TRANSFER CHARACTERISTICS
100
|y
fs
| - Forward Transfer Admittance - mS
V
DS
= 3 V
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
100
V
DS
= 3 V
10
I
D
- Drain Current - mA
T
A
= –25 ˚C
50
25 ˚C
1
T
A
= 75 ˚C
25 ˚C
–25 ˚C
125 ˚C
0.1
20
0.01
0.001
0
1
2
3
V
GS
- Gate to Source Voltage - V
0
1
2
5
10
20
I
D
- Drain Current - mA
50
100
R
DS(on)
- Drain to Source On-State Resistance -
Ω
100
50
R
DS(on)
- Drain to Source On-State Resistance -
Ω
DRAIN TO SOURCE ON-STATE RESISTANCE
vs. DRAIN CURRENT
V
GS
= 2.5 V
DRAIN TO SOURCE ON-STATE RESISTANCE
vs. DRAIN CURRENT
100
V
GS
= 4 V
50
20
10
5
T
A
= 75 ˚C
25 ˚C
–25 ˚C
20
10
5
T
A
= 75 ˚C
25 ˚C
–25 ˚C
2
1
1
2
5
10
20
I
D
- Drain Current - mA
50
100
2
1
1
2
5
10
20
I
D
- Drain Current - mA
50
100
3
µ
PA672T
DRAIN TO SOURCE ON-STAGE RESISTANCE
vs. GATE TO SOURCE VOLTAGE
30
I
D
= 10 mA
R
DS(on)
- Drain to Source On-State Resistance -
Ω
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
10
C
iss
, C
oss
, C
rss
, - Capacitance - pF
5
C
iss
C
oss
20
I
D
= 1 mA
10 mA
50 mA
2
1
0.5
C
rss
10
0.2
0.1
V
GS
= 0
f = 1 MHz
1
2
3
4
5
6
V
GS
- Gate to Source Voltage - V
7
1
2
5
10
20
50
V
DS
- Drain to Source Voltage - V
100
SWITCHING CHARACTERISTICS
100
100
t
r
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
t
d(on)
, t
r
, t
d(off)
, t
r
- Switching Time - ns
50
t
f
20
t
d(off)
I
SD
- Source to Drain Current - mA
10
5
t
d(on)
10
2
1
1
20
V
DD
= 3 V
V
GS(on)
= 3 V
R
G
= 10
Ω
1
0
0.2
0.4
0.6
0.8
1.0
V
SD
- Source to Drain Voltage - V
50
100 200
I
D
- Drain Current - mA
500
1000
4
µ
PA672T
REFERENCE
Document Name
NEC semiconductor device reliability/quality control system
Quality grade on NEC semiconductor devices
Semiconductor device mounting technology manual
Guide to quality assurance for semiconductor devices
Semiconductor selection guide
Document No.
TEI-1202
IEI-1209
C10535E
MEI-1202
X10679E
5
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