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SN74LS109ADRE4

Description
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70
Categorylogic    logic   
File Size595KB,13 Pages
ManufacturerTexas Instruments
Websitehttp://www.ti.com.cn/
Environmental Compliance
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SN74LS109ADRE4 Overview

Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70

SN74LS109ADRE4 Parametric

Parameter NameAttribute value
Brand NameTexas Instruments
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerTexas Instruments
Parts packaging codeSOIC
package instructionSOP, SOP16,.25
Contacts16
Reach Compliance Codecompli
Factory Lead Time6 weeks
Other featuresINVERTED K INPUT
seriesLS
JESD-30 codeR-PDSO-G16
JESD-609 codee4
length9.9 mm
Load capacitance (CL)15 pF
Logic integrated circuit typeJ-KBAR FLIP-FLOP
Maximum Frequency@Nom-Su25000000 Hz
MaximumI(ol)0.008 A
Humidity sensitivity level1
Number of digits2
Number of functions2
Number of terminals16
Maximum operating temperature70 °C
Minimum operating temperature
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingTR
Peak Reflow Temperature (Celsius)260
power supply5 V
Maximum supply current (ICC)15 mA
Prop。Delay @ Nom-Su35 ns
propagation delay (tpd)40 ns
Certification statusNot Qualified
Schmitt triggerN
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typePOSITIVE EDGE
width3.9 mm
minfmax25 MHz
Base Number Matches1

SN74LS109ADRE4 Related Products

SN74LS109ADRE4 SN74LS27NSRG4
Description Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 Logic Gates Triple 3 input pos NOR gates
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Maker Texas Instruments Texas Instruments
Parts packaging code SOIC SOIC
package instruction SOP, SOP16,.25 SOP, SOP14,.3
Contacts 16 14
Reach Compliance Code compli unknown
series LS LS
JESD-30 code R-PDSO-G16 R-PDSO-G14
JESD-609 code e4 e4
length 9.9 mm 10.2 mm
Load capacitance (CL) 15 pF 15 pF
Logic integrated circuit type J-KBAR FLIP-FLOP NOR GATE
MaximumI(ol) 0.008 A 0.008 A
Humidity sensitivity level 1 1
Number of functions 2 3
Number of terminals 16 14
Maximum operating temperature 70 °C 70 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SOP
Encapsulate equivalent code SOP16,.25 SOP14,.3
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE
method of packing TR TAPE AND REEL
Peak Reflow Temperature (Celsius) 260 260
power supply 5 V 5 V
Maximum supply current (ICC) 15 mA 6.8 mA
propagation delay (tpd) 40 ns 15 ns
Certification status Not Qualified Not Qualified
Schmitt trigger N NO
Maximum seat height 1.75 mm 2 mm
Maximum supply voltage (Vsup) 5.25 V 5.25 V
Minimum supply voltage (Vsup) 4.75 V 4.75 V
Nominal supply voltage (Vsup) 5 V 5 V
surface mount YES YES
technology TTL TTL
Temperature level COMMERCIAL COMMERCIAL
Terminal surface Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form GULL WING GULL WING
Terminal pitch 1.27 mm 1.27 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
width 3.9 mm 5.3 mm
Base Number Matches 1 1
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