SN74LVC1G32DCKTE4 datasheet, PDF

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SN74LVC1G32DCKTE4: DescriptionLogic Gates SNGL 2 Input Pos OR Gate; Categorylogic logic; File Size1MB，27 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

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SN74LVC1G32DCKTE4 Overview

Logic Gates SNGL 2 Input Pos OR Gate

SN74LVC1G32DCKTE4 Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Texas Instruments
Parts packaging code	SOIC
package instruction	TSSOP, TSSOP5/6,.08
Contacts	5
Reach Compliance Code	unknow
ECCN code	EAR99
series	LVC/LCX/Z
JESD-30 code	R-PDSO-G5
JESD-609 code	e4
length	2 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	OR GATE
MaximumI(ol)	0.024 A
Humidity sensitivity level	1
Number of functions	1
Number of entries	2
Number of terminals	5
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP5/6,.08
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing	TR
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Prop。Delay @ Nom-Su	4.5 ns
propagation delay (tpd)	8 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	1.65 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	1.25 mm

SN74LVC1G32DCKTE4 Related Products

	SN74LVC1G32DCKTE4	SN74LVC1G32DBVTE4
Description	Logic Gates SNGL 2 Input Pos OR Gate	Logic Gates SNGL 2 Input Pos OR Gate
Is it lead-free?	Lead free	Lead free
Is it Rohs certified?	conform to	conform to
Maker	Texas Instruments	Texas Instruments
Parts packaging code	SOIC	SOT-23
package instruction	TSSOP, TSSOP5/6,.08	LSSOP, TSOP5/6,.11,37
Contacts	5	5
Reach Compliance Code	unknow	unknow
series	LVC/LCX/Z	LVC/LCX/Z
JESD-30 code	R-PDSO-G5	R-PDSO-G5
JESD-609 code	e4	e4
length	2 mm	2.9 mm
Load capacitance (CL)	50 pF	50 pF
Logic integrated circuit type	OR GATE	OR GATE
MaximumI(ol)	0.024 A	0.024 A
Humidity sensitivity level	1	1
Number of functions	1	1
Number of entries	2	2
Number of terminals	5	5
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	LSSOP
Encapsulate equivalent code	TSSOP5/6,.08	TSOP5/6,.11,37
Package shape	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
method of packing	TR	TR
Peak Reflow Temperature (Celsius)	260	260
power supply	3.3 V	3.3 V
Prop。Delay @ Nom-Su	4.5 ns	4.5 ns
propagation delay (tpd)	8 ns	8 ns
Certification status	Not Qualified	Not Qualified
Schmitt trigger	NO	NO
Maximum seat height	1.1 mm	1.45 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V
Minimum supply voltage (Vsup)	1.65 V	1.65 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.95 mm
Terminal location	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
width	1.25 mm	1.6 mm

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