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74LV4052_15

Description
Dual 4-channel analog multiplexer/demultiplexer
File Size244KB,27 Pages
ManufacturerPhilips Semiconductors (NXP Semiconductors N.V.)
Websitehttps://www.nxp.com/
Download Datasheet View All

74LV4052_15 Overview

Dual 4-channel analog multiplexer/demultiplexer

74LV4052
Dual 4-channel analog multiplexer/demultiplexer
Rev. 4 — 1 July 2013
Product data sheet
1. General description
The 74LV4052 is a low-voltage CMOS device and is pin and function compatible with the
74HC/HCT4052.
The 74LV4052 is a dual 4-channel analog multiplexer/demultiplexer with a common select
logic. Each multiplexer has four independent inputs/outputs (nY0 to nY3) and a common
input/output (nZ). The common channel select logics include two digital select inputs (S0
and S1) and an active LOW enable input (E). With E LOW, one of the four switches is
selected (low impedance ON-state) by S0 and S1. With E HIGH, all switches are in the
high impedance OFF-state, independent of S0 and S1. V
CC
and GND are the supply
voltage pins for the digital control inputs (S0, S1 and E). The V
CC
to GND ranges are 1.0 V
to 6.0 V. The analog inputs/outputs (nY0, to nY3, and nZ) can swing between V
CC
as a
positive limit and V
EE
as a negative limit. V
CC
- V
EE
may not exceed 6.0 V. For operation
as a digital multiplexer/demultiplexer, V
EE
is connected to GND (typically ground).
2. Features and benefits
Optimized for low-voltage applications: 1.0 V to 6.0 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Low ON resistance:
145
(typical) at V
CC
V
EE
= 2.0 V
90
(typical) at V
CC
V
EE
= 3.0 V
60
(typical) at V
CC
V
EE
= 4.5 V
Logic level translation:
To enable 3 V logic to communicate with
3
V analog signals
Typical ‘break before make’ built in
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from
40 C
to +85
C
and from
40 C
to +125
C
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