NCP4206
VR11.1 Digital
Programmable Multi-Phase
Synchronous Buck
Converter with SMBus
The NCP4206 is an integrated power control IC with a SMBus
interface. The NCP4206 is a highly efficient, multiphase, synchronous
buck switching regulator controller, which aids design of High
Efficiency and High Density solutions. The NCP4206 can be
programmed for 1−, 2−, 3−, 4−, 5− or 6 phase operation, allowing for
the construction of up to 6 complementary buck switching stages.
The NCP4206 supports PSI, which is a power state indicator and
can be used to reduce the number of operating phases at light loads.
The SMBus interface enables digital programming of key system
parameters to optimize system performance and provide feedback to
the system.
The NCP4206 has a built in shunt regulator that allows the part to be
powered from the +12 V system supply through a series resistor. The
NCP4206 is specified over the extended commercial temperature
range of 0°C to +85°C and is available in a 48 Lead QFN package.
Features
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QFN 48
CASE 485AJ
1 48
MARKING DIAGRAM
NCP4206
AWLYYWWG
•
Selectable 1−, 2−, 3−, 4−, 5− or 6 Phase Operation at Up to 1.5 MHz
•
•
•
•
•
•
•
•
per Phase
Logic−level PWM Outputs for Interface to External High Power
Drivers
Fast−Enhanced PWM Flex Mode for Excellent Load Transient
Performance
Active Current Balancing Between All Output Phases
Built−in Power−good/Crowbar Blanking Supports On−the−Fly VID
Code Changes
Digitally Programmable 0.375 V to 1.6 V Output Supports VR11.1
Specifications
Short−Circuit Protection With Latch−off Delay
Supports PSI#
−
Power Saving Mode During Light Loads
This is a Pb−Free Device
A
WL
YY
WW
G
= Assembly Lot
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
PIN ASSIGNMENT
VID5
PWM1
38
VID1
VID3
VID4
VID0
VID6
PWM2
37
36
35
34
33
32
VID2
VID7
40
VCC
39
PSI
48
47
46
45
44
43
42
VCC3
PWRDG
ALERT
SDA
SCL
EN
GND
NC
NC
IMON
IREF
RT
1
2
3
4
5
6
7
8
9
10
11
12
13
41
PIN 1
INDICATOR
PWM3
PWM4
PWM5
PWM6
VCC
VCC
SW1
SW2
SW3
SW4
SW5
SW6
NCP4206
TOP VIEW
(Not to Scale)
31
30
29
28
27
26
25
14
16
17
18
15
19
20
21
22
23
NC
Typical Applications
RAMPADJ
•
Desktop PC
•
Servers
CSCOMP
CSSUM
ILIMIFS
ODN
OD1
FBRTN
COMP
CSREF
FB
ORDERING INFORMATION
Device
NCP4206MNR2G
Package
QFN48
(Pb−Free)
Shipping
†
2500 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2013
September, 2013
−
Rev. 2
1
Publication Order Number:
NCP4206/D
NC
24
NCP4206
VCC
39
VCC3
1
SCL SDA
5
4
RT
12
RAMPADJ
13
48
21
SHUNT
REGULATOR
3.3 V
REGULATOR
OSCILLATOR
SET
SMBUS
CMP
PSI
ODN
OD1
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
UVLO
SHUTDOWN
GND
EN/VTT
7
22
EN
38
37
36
35
34
33
RESET
RESET
850 mV
6
CMP
CMP
RESET
RESET
1− 6 PHASE
DRIVER
LOGIC
CONTROL
CONTROL
CSREF
CURRENT
BALANCING
CIRCUIT
CMP
CMP
RESET
RESET
CMP
CONTROL
PWRGD
2
DELAY
CROWBAR
CURRENT
LIMIT
30
29
28
27
SW1
SW2
SW3
SW4
SW5
SW6
ALERT
3
COMPARATORS
DIGITAL
REGISTERS
EN
FB
FBRTN
IMON
CONTROL
MUX
ADC
26
25
CONTROL
19
CSCOMP
CSREF
CSSUM
IMON
ILIMIFS
20
CURRENT
MEASUREMENT
AND LIMIT
17
18
10
CONTROL
IREF
COMP
11
16
15
FB
NCP4206
CONTROL
PRECISION
REFERENCE
VID DAC
BOOT VOLTAGE
AND SOFT−START
CONTROL
42
41
40
14
47
46
45
44
43
FBRTN
VID0 VID1 VID2 VID3 VID4 VID5 VID6 VID7
Figure 1. Simplified Block Diagram
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2
NCP4206
2.2W
Vin 12V
+
+
18nF
4.7uF
ADP3121
1200 uF
16 V
1
2
3
4
10nF
150 nH
BST
IN
OD
VCC
DRVH
8
SW
7
PGND
6
DRVL
5
Vcc Core
4.7uF
10W
Vcc Core (RTN)
Vcc Sense
Vcc Sense
2.2W
18nF
4.7uF
ADP3121
1
2
10nF
150 nH
BST
IN
OD
VCC
DRVH
8
SW
7
PGND
6
DRVL
5
1k
1 uF
X7R
1 uF
X7R
3
4
4.7uF
10W
680
680
1 uF
X7R
PSI
2.2W
18nF
4.7uF
PWM1
PSI
PWM2
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VID7
VCC
ADP3121
1
2
3
4
10nF
150 nH
POWER GOOD
ALERT
SMBus
Interface
VTT I/O
1nF
VCC3
PWRGD
ALERT
SDA
SCL
EN
GND
NC
NC
IMON
IREF
RT
BST
IN
OD
VCC
DRVH
8
SW
7
PGND
6
DRVL
5
PWM3
PWM4
PWM5
PWM6
VCC
4.7uF
1kW
1kW
1kW
1kW
1kW
1kW
SW1
SW2
SW3
SW4
SW5
SW6
1
2
3
4
10W
NCP4206
VCC
SW1
SW2
SW3
SW4
SW5
2.2W
18nF
4.7uF
CSSUM
CSREF
FBRTN
ILIMFS
4.7uF
CSCOMP
4.99k
W
121k
W
220k
W
RAMPADJ
COMP
SW6
ODN
OD1
NC
NC
ADP3121
BST
IN
OD
VCC
10nF
150 nH
FB
DRVH
8
SW
7
PGND
6
DRVL
5
7.5 k, 1%
348k
W
4.7uF
10W
2.2W
63.4 k
63.4 k
63.4 k
63.4 k
63.4 k
63.4 k
18nF
4.7uF
470 pF
X7R
1.21 k
3.3 pF
32.4 k
470 pF
X7R
1500 pF
X7R
1500 pF
X7R
35.7 k 82.5 k
ADP3121
1
2
3
4
10nF
150 nH
BST
IN
OD
VCC
DRVH
8
SW
7
PGND
6
DRVL
5
100 k Thermistor
5%
4.7uF
10W
2.2W
18nF
4.7uF
1000 pF
1
2
3
4
ADP3121
BST
IN
OD
VCC
10nF
150 nH
DRVH
8
SW
7
PGND
6
DRVL
5
10W
4.7uF
Figure 2. Applications Schematic
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3
NCP4206
Table 1. PIN ASSIGNMENT
Pin No.
1
2
3
4
5
6
7
8 to 9
10
11
12
13
14
15
16
17
Mnemonic
VCC3
PWRGD
ALERT
SDA
SCL
EN
GND
NC
IMON
IREF
RT
RAMPADJ
FBRTN
COMP
FB
CSREF
Description
3.3 V Power Supply Output. A capacitor from this pin to ground provided decoupling for the internal 3.3 V
LDO.
Power−Good Output: Open−drain output that signals when the output voltage is outside of the proper
operating range.
ALERT Output : Open drain output that asserts low when the VR exceeds a programmable limit. Can be
configured for Comparator Mode or Interrupt Mode.
Digital Input / Output. SMBus serial data bidirectional pin. Requires SMBus pull−up.
Digital Input. SMBus serial bus clock open drain input. Requires SMBus pull−up.
Power Supply Enable Input. Pulling this pin to GND disables the PWM outputs and pulls the PWRGD
output low.
Ground. All internal biasing and the logic output signals of the device are referenced to this ground
No Connect
Total Current Output Pin.
Current Reference Input. An external resistor from this pin to ground sets the reference current for I
FB
,
and I
ILIMFS
.
Frequency Setting Resistor Input. An external resistor connected between this pin and GND sets the
oscillator frequency of the device.
PWM Ramp Current Input. An external resistor from the converter input voltage to this pin sets the in-
ternal PWM ramp.
Feedback Return. VID DAC and error amplifier reference for remote sensing of the output voltage.
Error Amplifier Output and Compensation Point.
Feedback Input. Error amplifier input for remote sensing of the output voltage. An external resistor
between this pin and the output voltage sets the no load offset point.
Current Sense Reference Voltage Input. The voltage on this pin is used as the reference for the current
sense amplifier and the power−good and crowbar functions. This pin should be connected to the com-
mon point of the output inductors.
Current Sense Summing Node. External resistors from each switch node to this pin sum the average
inductor currents together to measure the total output current.
Current Sense Compensation Point. A resistor and capacitor from this pin to CSSUM determines the
gain of the current sense amplifier and the positioning loop response time.
Current Sense and Limit Scaling Pin. An external resistor from this pin to CSCOMP sets the internal
current sensing signal for current−limit and IMON. This value can be over−written using the SMBus inter-
face.
Output Disable Logic Output for PSI operation. This pin is actively pulled low when PSI is low, otherwise
it functions in the same way as OD1.
Output Disable Logic Output. This pin is actively pulled low when the EN input is low or when VCC is
below its UVLO threshold to signal to the Driver IC that the driver high−side and low−side outputs should
go low.
No Connection
Current Balance Inputs. Inputs for measuring the current level in each phase. The SW pins of unused
phases should be left open.
Supply Voltage for the Device. A 340
W
resistor should be placed between the 12 V system supply and
the VCC pin. The internal shunt regulator maintains V
CC
= 5 V.
Logic−Level PWM Outputs. Each output is connected to the input of an external MOSFET driver such as
the ADP3121. Connecting the PWM6, PWM5, PWM4, PWM3 and PWM2 outputs to VCC causes that
phase to turn off, allowing the NCP4206 to operate as a 1, 2−, 3−, 4−, 5− or 6, phase controller.
Voltage Identification DAC Inputs. These eight pins are pulled down to GND, providing a logic zero if left
open. When in normal operation mode, the DAC output programs the FB regulation voltage from
0.375 V to 1.6 V.
Power State Indicator. Pulling this pin low places the controller in lower power state operation.
18
19
20
CSSUM
CSCOMP
ILIMFS
21
22
ODN
OD1
23 to 24
25 to 30
31 to 32,
39
33 to 38
NC
SW6 to SW1
VCC
PWM6 to
PWM1
VID7 to VID0
40 to 47
48
PSI
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NCP4206
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Input Voltage Range (Note 1)
FBRTN
PWM2 to PWM6, Rampadj
SW1 to SW6
SW1 to SW6 (< 200 ns)
All other Inputs and Outputs
Storage Temperature Range
Operating Ambient Temperature Range
ESD Capability, Human Body Model (Note 2)
ESD Capability, Machine Model (Note 2)
Lead Temperature Soldering
Reflow (SMD Styles Only), Pb−Free Versions (Note 3)
ESD
HBM
ESD
MM
T
SLD
T
STG
Symbol
V
in
V
FBRTN
Value
−0.3
to 6
−0.3
to +0.3 V
−0.3
to V
in
+ 0.3
−5
to +25 V
−10
to +25 V
−0.3
to V
in
+ 0.3
−65
to 150
0 to 85
1.5
150
260
Unit
V
V
V
V
V
V
°C
°C
kV
V
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating:
v150
mA per JEDEC standard: JESD78
3. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D
Table 3. THERMAL CHARACTERISTICS
Rating
Thermal Characteristics, QFN, 7 x 7 mm (Note 4)
Thermal Resistance, Junction−to−Air (Note 5)
Symbol
R
θJA
Value
27
Unit
°C/W
4. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
5. Values based on copper area of 645 mm
2
(or 1 in
2
) of 1 oz copper thickness
and FR4 PCB substrate.
ELECTRICAL CHARACTERISTICS
V
IN
= (5.0 V) FBRTN
−
GND, for typical values T
A
= 25°C, for min/max values T
A
= 0°C to 85°C; unless otherwise noted. (Notes 6 and 8)
Parameter
REFERENCE CURRENT
Reference Bias Voltage
Reference Bias Current
ERROR AMPLIFIER
Output Voltage Range
Accuracy
Relative to nominal DAC output, referenced
to FBRTN (Note 8)
In startup
V
COMP
V
FB
V
FB(BOOT)
0
−9.0
1.091
−77
−350
0
−1.0
I
FB
= I
IREF
I
FB
13.3
15
1.1
−80
4.4
+9.0
1.109
−83
0
100
+1.0
18.5
V
mV
V
mV
mV
%
LSB
mA
R
IREF
= 121 kW
V
IREF
I
IREF
1.75
1.8
15
1.85
V
mA
Test Conditions
Symbol
Min
Typ
Max
Unit
Load Line Positioning Accuracy
Load Line Range
Load Line Attenuation
Differential Non−linearity
Input Bias Current
6. Refer to Absolute Maximum Ratings and Application Information for Safe Operating Area.
7. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at T
J
= T
A
= 25_C. Low
duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
8. Refer to Application Information Note.
9. Values based on design and/or characterization.
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