TLP2766
Photocouplers
GaAℓAs Infrared LED & Photo IC
TLP2766
1. Applications
•
•
•
Factory Networking
High-Speed Digital Interfacing for Instrumentation and Control Devices
Plasma Display Panels (PDPs)
2. General
The Toshiba TLP2766 consists of a high-output GaAℓAs light-emitting diode coupled with a high-speed photo-
diode-transistor chip. The TLP2766 guarantees operation at up to 125
and on supplies from 2.7 V to 5.5 V. It
is offered in the SDIP6 package. The TLP2766 has an internal Faraday shield that provides a guaranteed common-
mode transient immunity of
±20
kV/µs.
3. Features
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
Inverter logic type (Totem pole output)
Package: SDIP6
Operating temperature: -40 to 125
Supply voltage: 2.7 to 5.5 V
Data transfer rate: 20 MBd (typ.) (NRZ)
Threshold input current: 3.5 mA (max)
Supply current: 3 mA (max)
Common-mode transient immunity:
±20
kV/µs (min)
Isolation voltage: 5000 Vrms (min)
UL-approved: UL1577, File No.E67349
cUL-approved: CSA Component Acceptance Service No.5A File No.E67349
VDE-approved: EN60747-5-5 (Note 1)
Note 1: When an EN60747-5-5 approved type is needed, please designate the Option (D4)
(D4).
(10) Safety standards
Start of commercial production
©2015 Toshiba Corporation
1
2011-03
2015-10-06
Rev.5.0
TLP2766
4. Packaging and Pin Configuration
1: Anode
2: N.C.
3: Cathode
4: GND
5: V
O
(Output)
6: V
CC
11-5J1S
5. Internal Circuit (Note)
Fig. 5.1 Internal Circuit
Note:
A 0.1µF bypass capacitor must be connected between pin 6 and pin 4.
6. Principle of Operation
6.1. Truth Table
Input
H
L
LED
ON
OFF
M1
OFF
ON
M2
ON
OFF
Output
L
H
6.2. Mechanical Parameters
Characteristics
Creepage distances
Clearance distances
Internal isolation thickness
7.62-mm Pitch
TLP2766
7.0 (min)
7.0 (min)
0.4 (min)
10.16-mm Pitch
TLP2766F
8.0 (min)
8.0 (min)
0.4 (min)
Unit
mm
©2015 Toshiba Corporation
2
2015-10-06
Rev.5.0
TLP2766
7. Absolute Maximum Ratings (Note) (Unless otherwise specified, T
a
= 25
)
Characteristics
LED
Input forward current
Input forward current derating
Input forward current (pulsed)
Input forward current derating
(pulsed)
Input power dissipation
Input power dissipation
derating
Input reverse voltage
Detector Output current
Output voltage
Supply voltage
Output power dissipation
Output power dissipation
derating
Common Operating temperature
Storage temperature
Lead soldering temperature
Isolation voltage
(10 s)
AC, 60 s, R.H.
≤
60 %
(T
a
≥
110
)
(T
a
≥
110
)
(T
a
≥
110
)
(T
a
≥
110
)
Symbol
I
F
∆I
F
/∆T
a
I
FP
∆I
FP
/∆T
a
P
D
∆P
D
/∆T
a
V
R
I
O
V
O
V
CC
P
O
∆P
O
/∆T
a
T
opr
T
stg
T
sol
BV
S
(Note 2)
(Note 1)
Note
Rating
25
-0.67
40
-1.0
40
-1.0
5
10
6
6
60
-1.5
-40 to 125
-55 to 150
260
5000
Vrms
mW
mW/
Unit
mA
mA/
mA
mA/
mW
mW/
V
mA
V
Note:
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Pulse width (PW)
≤
1 ms, duty = 50 %
Note 2: This device is considered as a two-terminal device: Pins 1, 2 and 3 are shorted together, and pins 4, 5 and 6
are shorted together.
8. Recommended Operating Conditions (Note)
Characteristics
Input on-state current
Input off-state voltage
Supply voltage
Operating temperature
Symbol
I
F(ON)
V
F(OFF)
V
CC
T
opr
(Note 2)
(Note 2)
Note
(Note 1)
Min
4.5
0
2.7
-40
Typ.
3.3/5.0
Max
15
0.8
5.5
125
Unit
mA
V
The recommended operating conditions are given as a design guide necessary to obtain the intended
performance of the device. Each parameter is an independent value. When creating a system design using
this device, the electrical characteristics specified in this datasheet should also be considered.
Note: A ceramic capacitor (0.1
µF)
should be connected between pin 6 and pin 4 to stabilize the operation of a high-
gain linear amplifier. Otherwise, this photocoupler may not switch properly. The bypass capacitor should be
placed within 1 cm of each pin.
Note 1: The rise and fall times of the input on-current should be less than 0.5
µs.
Note 2: Denotes the operating range, not the recommended operating condition.
Note:
©2015 Toshiba Corporation
3
2015-10-06
Rev.5.0
TLP2766
9. Electrical Characteristics (Note)
(Unless otherwise specified, T
a
= -40 to 125
, V
CC
= 2.7 to 5.5 V)
Characteristics
Input forward voltage
Input forward voltage temperature
coefficient
Input reverse current
Input capacitance
Low-level output voltage
High-level output voltage
Symbol
V
F
∆V
F
/∆T
a
I
R
C
t
V
OL
V
OH
Test
Circuit
Fig.
12.1.1
Fig.
12.1.2
Test Condition
I
F
= 10 mA, T
a
= 25
I
F
= 10 mA
V
R
= 5 V, T
a
= 25
V = 0 V, f = 1 MHz, T
a
= 25
I
F
= 14 mA, I
O
= 4 mA
V
F
= 1.05 V, I
O
= -4 mA,
V
CC
= 3.3 V
V
F
= 1.05 V, I
O
= -4 mA,
V
CC
= 5 V
Low-level supply current
High-level supply current
Threshold input current (H/L)
I
CCL
I
CCH
I
FHL
Fig.
12.1.3
Fig.
12.1.4
I
F
= 14 mA
I
F
= 0 mA
I
O
= 1.6 mA, V
O
< 0.4 V
Min
1.45
2.3
4
Typ.
1.55
-2.0
60
1.6
1.5
0.9
Max
1.7
10
0.4
3
3
3.5
mA
Unit
V
mV/
µA
pF
V
Note:
All typical values are at T
a
= 25
.
10. Isolation Characteristics (Unless otherwise specified, T
a
= 25
)
Characteristics
Total capacitance (input to output)
Isolation resistance
Isolation voltage
Symbol
C
S
R
S
BV
S
Note
Test Conditions
Min
1×10
12
5000
Typ.
0.8
10
14
10000
10000
Max
Vdc
Unit
pF
Ω
Vrms
(Note 1) V
S
= 0 V, f = 1 MHz
(Note 1) V
S
= 500 V, R.H.
≤
60 %
(Note 1) AC, 60 s
AC, 1 s in oil
DC, 60 s in oil
Note 1: This device is considered as a two-terminal device: Pins 1, 2 and 3 are shorted together, and pins 4, 5 and 6
are shorted together.
©2015 Toshiba Corporation
4
2015-10-06
Rev.5.0
TLP2766
11. Switching Characteristics (Note)
11.1. Switching Characteristics (1)
(Unless otherwise specified, T
a
= -40 to 125
, V
CC
= 2.7 to 3.6 V)
Characteristics
Propagation delay time (H/L)
Propagation delay time (L/H)
Pulse width distortion
Propagation delay skew
(device to device)
Propagation delay time (H/L)
Propagation delay time (L/H)
Pulse width distortion
Propagation delay skew
(device to device)
Fall time
Rise time
Common-mode transient
immunity at output high
Common-mode transient
immunity at output low
Symbol
t
pHL
t
pLH
|t
pHL
-
t
pLH
|
t
psk
t
pHL
t
pLH
|t
pHL
-
t
pLH
|
t
psk
t
f
t
r
CM
H
Note
(Note 1)
(Note 1)
(Note 1)
(Note 1),
(Note 2)
(Note 1)
(Note 1)
(Note 1)
(Note 1),
(Note 2)
(Note 1)
(Note 1)
Fig. I
F
= 0
→
14 mA, R
IN
= 100
Ω,
12.1.5 C
L
= 15 pF
I
F
= 14
→
0 mA, R
IN
= 100
Ω,
C
L
= 15 pF
Fig. V
CM
= 1000 V
p-p
, I
F
= 0 mA,
12.1.6 V
O(min)
= 2 V, V
CC
= 3.3 V,
T
a
= 25
V
CM
= 1000 V
p-p
, I
F
= 14 mA,
V
O(max)
= 0.4 V, V
CC
= 3.3 V,
T
a
= 25
Fig. I
F
= 0
→
6 mA, R
IN
= 100
Ω,
12.1.5 C
L
= 15 pF
I
F
= 6
→
0 mA, R
IN
= 100
Ω,
C
L
= 15 pF
I
F
= 6 mA, R
IN
= 100
Ω,
C
L
= 15 pF
Test
Circuit
Test Condition
Min
-30
-30
±20
Typ.
28
25
3
34
25
9
15
15
±25
Max
40
40
25
30
55
55
30
30
kV/µs
Unit
ns
Fig. I
F
= 0
→
14 mA, R
IN
= 100
Ω,
12.1.5 C
L
= 15 pF
I
F
= 14
→
0 mA, R
IN
= 100
Ω,
C
L
= 15 pF
I
F
= 14 mA, R
IN
= 100
Ω,
C
L
= 15 pF
CM
L
±20
±25
Note: All typical values are at T
a
= 25
.
Note 1: f = 5 MHz, duty = 50 %, input current t
r
= t
f
= 5 ns, C
L
is approximately 15 pF which includes probe and stray
wiring capacitance.
Note 2: The propagation delay skew, t
psk
, is equal to the magnitude of the worst-case difference in t
pHL
and/or t
pLH
that will be seen between units at the same given conditions (supply voltage, input current, temperature, etc).
©2015 Toshiba Corporation
5
2015-10-06
Rev.5.0
DSP and ARM Processors
京公网安备 11010802033920号
EEWORLD
