Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BU1706AB
GENERAL DESCRIPTION
High-voltage, high-speed switching npn transistor in a plastic envelope suitable for surface mounting, intended for
use in high frequency electronic lighting ballast applications.
QUICK REFERENCE DATA
SYMBOL
V
CESM
V
CEO
I
C
I
CM
P
tot
V
CEsat
I
Csat
t
f
PARAMETER
Collector-emitter voltage peak value
Collector-emitter voltage (open base)
Collector current (DC)
Collector current peak value
Total power dissipation
Collector-emitter saturation voltage
Collector saturation current
Fall time
CONDITIONS
V
BE
= 0 V
TYP.
-
-
-
-
-
-
1.5
0.25
MAX.
1750
850
5
8
100
1.0
-
0.6
UNIT
V
V
A
A
W
V
A
µs
T
mb
≤
25 ˚C
I
C
= 1.5 A; I
B
= 0.3 A
I
CM
= 1.5 A; I
B(on)
= 0.3 A
PINNING - SOT404
PIN
1
2
3
mb
base
collector
emitter
collector
DESCRIPTION
PIN CONFIGURATION
mb
SYMBOL
c
b
2
1
3
e
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL
V
CESM
V
CEO
I
C
I
CM
I
B
I
BM
-I
B(AV)
-I
BM
P
tot
T
stg
T
j
PARAMETER
Collector-emitter voltage peak value
Collector-emitter voltage (open base)
Collector current (DC)
Collector current peak value
Base current (DC)
Base current peak value
Reverse base current
Reverse base current peak value
Total power dissipation
Storage temperature
Junction temperature
CONDITIONS
V
BE
= 0 V
MIN.
-
-
-
-
-
-
-
-
-
-65
-
MAX.
1750
850
5
8
3
5
100
4
100
150
150
UNIT
V
V
A
A
A
A
mA
A
W
˚C
˚C
average over any 20ms period
T
mb
≤
25 ˚C
THERMAL RESISTANCES
SYMBOL
R
th j-mb
R
th j-a
PARAMETER
Thermal resistance junction to mounting
base
Thermal resistance junction to ambient
minimum footprint, FR4 board
CONDITIONS
TYP.
-
55
MAX.
1.25
-
UNIT
K/W
K/W
February 1998
1
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BU1706AB
STATIC CHARACTERISTICS
T
mb
= 25 ˚C unless otherwise specified
SYMBOL
I
CES
I
CES
I
CES
I
EBO
V
CEOsust
V
CEsat
V
BEsat
h
FE
h
FE
h
FE
PARAMETER
Collector cut-off current
1
CONDITIONS
V
BE
= 0 V; V
CE
= V
CESMmax
V
BE
= 0 V; V
CE
= 1500 V
V
BE
= 0 V; V
CE
= V
CESMmax
;
T
j
= 125 ˚C
V
EB
= 12 V; I
C
= 0 A
I
B
= 0 A; I
C
= 100 mA;
L = 25 mH
I
C
= 1.5 A; I
B
= 0.3 A
I
C
= 1.5 A; I
B
= 0.3 A
I
C
= 5 mA; V
CE
= 10 V
I
C
= 400 mA; V
CE
= 3 V
I
C
= 1.5 A; V
CE
= 1 V
MIN.
-
-
-
-
750
-
-
8
12
5
TYP.
-
-
-
-
-
-
-
-
18
7
MAX.
1.0
20
2.0
1
-
1.0
1.3
-
35
-
UNIT
mA
µA
mA
mA
V
V
V
Emitter cut-off current
Collector-emitter sustaining voltage
Collector-emitter saturation voltage
Base-emitter saturation voltage
DC current gain
DYNAMIC CHARACTERISTICS
T
mb
= 25 ˚C unless otherwise specified
SYMBOL
t
on
t
s
t
f
PARAMETER
Switching times (resistive load)
Turn-on time
Turn-off storage time
Turn-off fall time
Switching times (inductive load)
t
s
t
f
Turn-off storage time
Turn-off fall time
Switching times (inductive load)
t
s
t
f
Turn-off storage time
Turn-off fall time
CONDITIONS
I
Con
= 1.5 A; I
Bon
= -I
Boff
= 0.3 A
TYP.
1.1
5
0.75
MAX.
1.5
6.5
1.0
UNIT
µs
µs
µs
µs
µs
µs
µs
I
Con
= 1.5 A; I
Bon
= 0.3 A; L
B
= 1
µH;
-V
BB
= 5 V
I
Con
= 1.5 A; I
Bon
= 0.3 A; L
B
= 1
µH;
-V
BB
= 5 V; T
j
= 100 ˚C
2.0
0.25
3.0
0.6
2.2
0.2
3.3
0.7
IC / mA
+ 50v
100-200R
250
Horizontal
Oscilloscope
Vertical
300R
30-60 Hz
6V
1R
200
100
0
VCE / V
min
VCEOsust
Fig.1. Test circuit for V
CEOsust
.
Fig.2. Oscilloscope display for V
CEOsust
.
1
Measured with half sine-wave voltage (curve tracer).
February 1998
2
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BU1706AB
VCC
VCC
RL
VIM
0
tp
T
-VBB
LC
VCL
IBon
LB
T.U.T.
RB
T.U.T.
Fig.3. Test circuit resistive load. V
IM
= -6 to +8 V
V
CC
= 250 V; tp = 20
µ
s;
δ
= tp / T = 0.01.
R
B
and R
L
calculated from I
Con
and I
Bon
requirements.
ICon
Fig.6. Test Circuit RBSOA.
V
CC
= 150 V; -V
BB
= 5 V; L
C
= 2 mH; V
CL
≤
1500 V;
L
B
= 1
µ
H
90 %
90 %
ICon
90 %
IC
IC
10 %
ts
ton
toff
IBon
10 %
tr
30ns
-IBoff
tf
10 %
ts
toff
IB
IBon
t
-IBoff
tf
t
IB
Fig.4. Switching times waveforms with resistive load.
Fig.7. Switching times waveforms with inductive load.
VCC
120
110
100
90
80
PD%
Normalised Power Derating
LC
70
60
50
IBon
LB
T.U.T.
40
30
20
10
0
0
20
40
60
80
100
Tmb / C
120
140
-VBB
Fig.5. Test circuit inductive load.
V
CC
= 300 V; -V
BE
= 5 V; L
B
= 1 uH
Fig.8. Normalised power dissipation.
PD% = 100
⋅
PD/PD
25 ˚C
= f (T
mb
)
February 1998
3
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BU1706AB
1E+01
Zth / (K/W)
BU1706A
1.2
1.1
VBESAT / V
Tj = 25 C
Tj = 125 C
BU1706A
1E+00
0.5
0.2
0.1
0.05
0.02
1
0.9
P
D
tp
1E-01
D=
t
p
T
t
0.8
0.7
0.6
IC =
3A
2A
1.5 A
0.5 A
0
1
2
IB / A
3
4
1E-02
D=0
1E-03
1E-07
T
1E-05
1E-03
t/s
1E-01
1E+01
Fig.9. Transient thermal impedance.
Z
th j-mb
= f(t); parameter D = t
p
/T
VBESAT / V
BU1706A
Fig.12. Typical base-emitter saturation voltage.
V
BEsat
= f(I
B
); parameter I
C
VCESAT / V
BU1706A
1.2
1.1
1
0.9
0.8
10
Tj = 25 C
Tj = 125 C
1
2A
3A
IC/IB =
0.7
0.6
0.5
0.4
0.1
1
IC / A
4
5
6
0.01
0.01
0.1
IC = 0.5A
1.5 A
Tj = 25 C
Tj = 125 C
10
0.1
IB / A
1
10
Fig.10. Typical base-emitter saturation voltage.
V
BEsat
= f(I
C
); parameter I
C
/I
B
VCESAT / V
IC/IB =
6
5
4
BU1706A
Fig.13. Typical collector-emitter saturation voltage.
V
CEsat
= f(I
B
); parameter I
C
h
FE
5V
BU1706A
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
100
10
1V
Tj = 25 C
Tj = 125 C
Tj = 25 C
1
Tj = 125 C
0.1
1
IC / A
10
0.1
0.01
0.1
IC / A
1
10
Fig.11. Typical collector-emitter saturation voltage.
V
CEsat
= f(I
C
); parameter I
C
/I
B
Fig.14. Typical DC current gain.
h
FE
= f(I
C
); parameter V
CE
February 1998
4
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BU1706AB
IC / A
10
I
CM
6
5
IC / A
BU1706A
I
CDC
4
3
2
1
P
tot
1
0
0
400
tp =
800
1200
VCE / V
1600
2000
Fig.16. Reverse bias safe operating area. T
j
≤
T
jmax
0.1
100 us
1 ms
10 ms
DC
0.01
1
10 VCE / V 100
1000
Fig.15. Forward bias safe operating area. T
mb
= 25 ˚C
I
II
NB:
Region of permissible DC operation.
Extension for repetitive pulse operation.
Mounted with heatsink compound and
30
±
5 newton force on the centre of the
envelope.
February 1998
5
Rev 1.000
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