Doc No.
TA4-EA-06262
Revision.
2
Product Standards
NN31001A
http://www.semicon.panasonic.co.jp/en/
7 A Synchronous DC-DC Step down Regulator,
Power Supply in Package
(V
IN
= 4.5 V to 28 V, V
OUT
= 0.6 V to 5.5 V)
FEATURES
High-Speed Response DC-DC Step Down Regulator Circuit
that employs Hysteretic Control System
Built-in inductor and capacitors
Skip (discontinuous) Mode for high efficiency at light load
Maximum Output Current : 7 A
DESCRIPTION
NN31001A is a synchronous DC-DC step down
regulator (1-ch), Power Supply in Package (PSiP), which
integrates a Controller IC that employs a hysteretic
control system, two Power MOSFETs, an Inductor and
Capacitors into a single 8.5 x 7.5 x 4.7mm QFN package.
The easiness of mounting PSiP onto a Printed Circuit
Board (PCB), a very small footprint and a highly reduced
number of external components, offers very compact
and simplified solutions for applications requiring point-
of-load design.
The number of external components have been reduced
to only input/output capacitor, slow start capacitor and
feedback resistors.
Furthermore, for applications requiring an output voltage
of 1.0 V / 3.3 V, the external feedback resistors can be
eliminated, resulting into even a smaller footprint.
The PSiP achieves efficiencies of greater than 94% with
very good power dissipation capabilities.
Input Voltage Range : PVIN=AVIN = 4.5 V to 28 V,
Output Voltage Range : 0.6 V to 5.5 V
Selectable Switching Frequency 400 kHz / 600 kHz / 800kHz
Built-in Feed Back Resistors for 1.0 V / 3.3 V default settings
Configurable output voltage settings using external Resistors
Adjustable Soft Start
Low Operating and Standby Quiescent Current
Open Drain Power Good Indication for Output Over / Under
Voltage
Selectable Auto recovery / latch off protection system
Adjustable current limit threshold
Built-in Under Voltage Lockout (UVLO),
Thermal Shut Down (TSD), Under Voltage Detection (UVD),
APPLICATIONS
Over Voltage Detection (OVD), Short Circuit Protection (SCP)
High Current Distributed Power Systems such as
Over Current Protection (OCP)
・DSP
and FPGA Point-of-Load Applications
Plastic Quad Flat Non-leaded Package Heat Slug Down
・Routers
(QFN Type, Size : 8.5 mm
7.5 mm, 0.5 mm pitch)
・Industrial
Equipment
・Space
constrained Applications etc.
SIMPLIFIED APPLICATION
VREG
VIN
10
µ
F x 2
EN
100k
PGOOD
PRTCNT
OCPCNT
100
90
PVIN
AVIN
BST
LX
Efficiency [%]
80
70
60
50
40
0.01
0.1
IOUT [A]
1
VOUT=1V, Fsw=400kHz
VOUT=1V, Fsw=600kHz
VOUT=1V, Fsw=800kHz
VOUT=3.3V, Fsw=600kHz
VOUT=3.3V, Fsw=800kHz
1k
VFB
1.5k
SS
4.7nF
NN31001A
VREG
MODE
FSEL
VOUTM
VOUT
V
OUT
= 1.0V
#1.0V / 3.3V
without using FB resistor
AGND1, 2
PGND
22
µ
F x 3
7
10
Note : The application circuit is an example. The operation of
the mass production set is not guaranteed. Sufficient
evaluation and verification is required in the design of
the mass production set. The Customer is fully
responsible for the incorporation of the above
illustrated application circuit in the design of the
equipment.
Condition :
Vin = 12 V, V
OUT
Setting = 1.0 V / 3.3 V
Switching Frequency = 400 / 600 / 800 kHz, Skip mode
Co = 66 µF ( 22 µF x 3 )
Page 1 of 33
Established : 2014-07-03
Revised
: 2014-07-08
Doc No.
TA4-EA-06262
Revision.
2
Product Standards
NN31001A
ORDERING INFORMATION
Order Number
NN31001A-BB
Feature
Maximum Output Current : 7 A
Package
57 pin HQFN
Output Supply
Emboss Taping
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply voltage
Operating free-air temperature
Operating junction temperature
Storage temperature
Input Voltage Range
Symbol
V
IN
T
opr
T
j
T
stg
V
MODE
,V
FSEL
,V
OUTM
,V
PRTCNT
V
OCPCNT
,V
FB
V
EN
V
PGOOD
Output Voltage Range
V
LX
ESD
HBM
– 0.3 to (V
IN
+ 0.3)
2
V
kV
Rating
30
– 40 to + 85
– 40 to + 150
– 55 to + 150
– 0.3 to (V
REG
+ 0.3)
– 0.3 to 6.0
– 0.3 to (V
REG
+ 0.3)
Unit
V
C
C
C
V
V
V
Notes
*1
*2
*2
*2
*1
*3
*1
*1
*3
*1
*4
—
Notes : This product may sustain permanent damage if subjected to conditions higher than the above stated absolute
maximum rating. This rating is the maximum rating and device operating at this range is not guaranteed as it
is higher than our stated recommended operating range.
When subjected under the absolute maximum rating for a long time, the reliability of the product may be affected.
V
IN
is voltage for AVIN, PVIN. V
IN
= AV
IN
= PV
IN
.
Do not apply external currents and voltages to any pin not specifically mentioned.
*1 : The values under the condition not exceeding the above absolute maximum ratings and
the power dissipation.
*2 : Except for the power dissipation, operating ambient temperature, and storage temperature,
all ratings are for T
a
= 25
C.
*3 :(V
REG
+ 0.3) V must not exceed 6 V.
*4 : (V
IN
+ 0.3) V must not exceed 30 V.
Page 2 of 33
Established : 2014-07-03
Revised
: 2014-07-08
Doc No.
TA4-EA-06262
Revision.
2
Product Standards
NN31001A
POWER DISSIPATION RATING
Package
Plastic Quad Flat Non-leaded Package
Heat Slug Down (QFN Type)
j-C
6.7
C
/ W
5.7
C
/ W
PD
(Ta = 25
C)
3.49 W
5.56 W
PD
(Ta = 85
C)
1.82 W
2.89 W
Notes
*1
*2
Notes : For the actual usage, please follow the power supply voltage, load and ambient temperature conditions to ensure that there is
enough margin and the thermal design does not exceed the allowable value.
*1:Glass Epoxy Substrate (4 Layers) [50
50
0.8 t (mm)]
*2:Glass Epoxy Substrate (4 Layers) [50
50
1.57 t (mm)]
CAUTION
Although this IC has built-in ESD protection circuit, it may still sustain permanent damage if not handled
properly. Therefore, proper ESD precautions are recommended to avoid electrostatic damage to the MOS
gates.
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply voltage range
Symbol
AV
IN
PV
IN
V
MODE
Input Voltage Range
V
FSEL
V
PRTCNT
V
EN
Output Voltage Range
V
PGOOD
V
LX
Min
4.5
4.5
– 0.3
– 0.3
– 0.3
– 0.3
– 0.3
– 0.3
Typ
12
12
—
—
—
—
—
—
Max
28
28
V
REG
+ 0.3
V
REG
+ 0.3
V
REG
+ 0.3
5.0
V
REG
+ 0.3
V
IN
+ 0.3
Unit
V
V
V
V
V
V
V
V
Notes
—
—
*1
*1
*1
—
*1
*2
Notes : Voltage values, unless otherwise specified, are with respect to GND.
GND is voltage for AGND, PGND. AGND = PGND
V
IN
is voltage for AVIN, PVIN. V
IN
= AV
IN
= PV
IN
.
Do not apply external currents or voltages to any pin not specifically mentioned.
*1 : (V
REG
+ 0.3) V must not exceed 6 V.
*2 : (V
IN
+ 0.3) V must not exceed 30 V.
Page 3 of 33
Established : 2014-07-03
Revised
: 2014-07-08
Doc No.
TA4-EA-06262
Revision.
2
Product Standards
NN31001A
ELECTRICAL CHARACTERISTICS
C
O
= 22 µF
3, V
OUT
Setting = 1.0 V, V
IN
= AV
IN
= PV
IN
= 12 V
,
Switching Frequency = 600 kHz
V
MODE
= V
REG
(FCCM), T
a
= 25
C
2
C
unless otherwise noted.
Limits
Min
Typ
Max
Parameter
Current Consumption
Current Consumption at active1
(Skip mode)
Symbol
Condition
Unit Note
I
VDDACTN1
I
OUT
= 0 A, V
FB
= 0.620 V
R
FB1
= 1.0 k
R
FB2
= 1.5 k
V
MODE
= 0 V, V
EN
= 5 V
V
EN
= 5 V , I
OUT
= 0 A
R
FB1
= 1.0 k
R
FB2
= 1.5 k
V
MODE
= V
REG
V
FSEL
= OPEN
AV
IN
= PV
IN
= 12 V
V
EN
= 0 V
—
—
V
EN
= 5 V
—
—
V
MODE
= 5 V
—
—
V
EN
= 5 V, V
PRTCNT
= 5 V
—
—
V
FSEL
= 5 V
V
FSEL
= 0 V
—
700
1200
µA
—
Current Consumption at active2
(FCCM)
I
VDDACTN2
—
15
23
mA
—
AVIN/PVIN Current Consumption
at standby
Logic Pin Characteristics
EN pin Low-level input voltage
EN pin High-level input voltage
EN pin leakage current
MODE pin Low-level input voltage
MODE pin High-level input voltage
MODE pin leakage current
PRTCNT pin Low-level input
voltage
PRTCNT pin High-level input
voltage
PRTCNT pin leakage current
FSEL pin Low-level input voltage
FSEL pin High-level input voltage
FSEL pin High leakage current
FSEL pin Low leakage current
I
VINSTB
—
2
5
µA
—
V
ENL
V
ENH
I
LEAKEN
V
MODEL
V
MODEH
I
LEAKMD
V
PRTL
V
PRTH
I
LEAKPRT
V
FSELL
V
FSELH
I
LEAKFSH
I
LEAKFSL
—
1.5
—
—
V
REG
0.7
—
—
V
REG
– 0.3
—
—
V
REG
– 0.3
—
—
—
—
10
—
—
12.5
—
—
0
—
—
6.25
6.25
0.3
5.0
20
V
REG
0.3
V
REG
25
0.3
—
2
0.3
—
12.5
12.5
V
V
µA
V
V
µA
V
V
µA
V
V
µA
µA
—
—
—
—
—
—
—
—
—
—
—
—
—
Page 4 of 33
Established : 2014-07-03
Revised
: 2014-07-08
Doc No.
TA4-EA-06262
Revision.
2
Product Standards
NN31001A
ELECTRICAL CHARACTERISTICS (Continued)
C
O
= 22 µF
3, V
OUT
Setting = 1.0 V, V
IN
= AV
IN
= PV
IN
= 12 V, Switching Frequency = 600 kHz
V
MODE
= V
REG
(FCCM), T
a
= 25
C
2
C
unless otherwise noted.
Limits
Min
5.3
—
4.1
Typ
5.6
—
—
Max
5.9
150
—
Parameter
VREG Characteristics
Output voltage
Input voltage variation
Drop out voltage
VFB Characteristics
VFB comparator threshold
VFB pin leakage current 1
VFB pin leakage current 2
Under Voltage Lock Out
UVLO shutdown voltage
UVLO wakeup voltage
UVLO hysteresis
PGOOD
PGOOD Threshold 1
(VFB ratio for UVD detect)
PGOOD Hysteresis 1
(VFB ratio for UVD release)
PGOOD Threshold 2
(VFB ratio for OVD detect)
PGOOD Hysteresis 2
(VFB ratio for OVD release)
PGOOD start up delay time
( After reached V
FB
= 0.6 V )
PGOOD ON resistance
Symbol
Condition
Unit Note
V
REGO
V
REGLIN
V
REGDO
I
VREG
= 5mA
V
REGLIN
= V
REG
(V
IN
=12 V)
-V
REG
(V
IN
=6 V)
I
VREG
= 5mA
V
IN
= 4.5 V, I
VREG
= 5mA
—
V
FB
= 0 V
V
FB
= 6 V
V
IN
= 5 V to 0 V
V
IN
= 0 V to 5 V
—
V
mV
V
—
—
—
V
FBTH
I
LEAKFB1
I
LEAKFB2
0.594
–1
–1
0.600
—
—
0.606
1
1
V
µA
µA
—
—
—
V
UVLODE
V
UVLORE
V
UVLO
3.97
4.17
150
4.10
4.30
200
4.23
4.43
250
V
V
mV
—
—
—
V
PGUV
V
PGUV
V
PGOV
V
PGOV
T
PGD
R
PG
PGOOD : High to Low
PGOOD : Low to High
PGOOD : High to Low
PGOOD : Low to High
—
—
77
3.5
107
3.5
0.4
—
85
5.0
115
5.0
1.0
10
93
6.5
123
6.5
1.6
15
%
%
%
%
ms
—
—
—
—
—
—
Page 5 of 33
Established : 2014-07-03
Revised
: 2014-07-08
京公网安备 11010802033920号
EEWORLD
