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NL17SH32

Description
17SH SERIES, 2-INPUT OR GATE, PDSO5
Categorysemiconductor    logic   
File Size58KB,5 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Download Datasheet Parametric View All

NL17SH32 Overview

17SH SERIES, 2-INPUT OR GATE, PDSO5

NL17SH32 Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals5
Minimum operating temperature-55 Cel
Maximum operating temperature125 Cel
Rated supply voltage3.3
Minimum supply/operating voltage2 V
Maximum supply/operating voltage5.5 V
Processing package descriptionLEAD FREE, SOT-953, 5 PIN
each_compliYes
EU RoHS regulationsYes
China RoHS regulationsYes
stateActive
Logic IC typeOR GATE
series17SH
jesd_30_codeR-PDSO-F5
jesd_609_codee3
moisture_sensitivity_levelNOT SPECIFIED
Number of inputs2
Packaging MaterialsPLASTIC/EPOXY
ckage_codeVSOF
packaging shapeRECTANGULAR
Package SizeSMALL OUTLINE, VERY THIN PROFILE
eak_reflow_temperature__cel_NOT SPECIFIED
propagation delay TPD15.5 ns
qualification_statusCOMMERCIAL
seated_height_max0.4000 mm
surface mountYES
CraftsmanshipCMOS
Temperature levelMILITARY
terminal coatingMATTE TIN
Terminal formFLAT
Terminal spacing0.3500 mm
Terminal locationDUAL
ime_peak_reflow_temperature_max__s_NOT SPECIFIED
length1 mm
width0.8000 mm
NL17SH32
Single 2-Input OR Gate
The NL17SH32 is an advanced high speed CMOS 2−input OR gate
fabricated with silicon gate CMOS technology.
The internal circuit is composed of multiple stages, including a
buffer output which provides high noise immunity and stable output.
The NL17SH32 input structure provides protection when voltages
up to 7 V are applied, regardless of the supply voltage. This allows the
NL17SH32 to be used to interface 5 V circuits to 3 V circuits.
Features
http://onsemi.com
MARKING
DIAGRAM
SOT−953
CASE 527AE
FM
1
High Speed: t
PD
= 3.7 ns (Typ) at V
CC
= 5 V
Low Power Dissipation: I
CC
= 1
mA
(Max) at T
A
= 25°C
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Pin and Function Compatible with Other Standard Logic Families
These are Pb−Free Devices
F
M
= Specific Device Code
= Month Code
PIN ASSIGNMENT
1
2
3
IN A
1
5
V
CC
4
5
GND
2
IN A
GND
IN B
OUT Y
V
CC
FUNCTION TABLE
Inputs
Output
B
L
H
L
H
Y
L
H
H
H
3
4
OUT Y
A
L
L
H
H
IN B
Figure 1. Pinout
(Top View)
IN A
IN B
1
OUT Y
Figure 2. Logic Symbol
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
©
Semiconductor Components Industries, LLC, 2014
1
April, 2014 − Rev. 2
Publication Order Number:
NL17SH32/D
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