L1RJ402395KC65 datasheet, PDF - EEWORLD Datasheet

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L1RJ402395KC65: DescriptionCeramic Capacitor, Multilayer, Ceramic, 200V, 10% +Tol, 10% -Tol, BR, -/+15ppm/Cel TC, 3.9uF, 3944,; CategoryPassive components capacitor; File Size64KB，1 Pages; ManufacturerKEMET; Websitehttp://www.kemet.com

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L1RJ402395KC65 Overview

Ceramic Capacitor, Multilayer, Ceramic, 200V, 10% +Tol, 10% -Tol, BR, -/+15ppm/Cel TC, 3.9uF, 3944,

L1RJ402395KC65 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Objectid	709356976
package instruction	, 3944
Reach Compliance Code	not_compliant
ECCN code	EAR99
capacitance	3.9 µF
Capacitor type	CERAMIC CAPACITOR
dielectric materials	CERAMIC
high	18.29 mm
JESD-609 code	e0
length	9.845 mm
multi-layer	Yes
negative tolerance	10%
Number of terminals	2
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package form	SMT
method of packing	Box
positive tolerance	10%
Rated (DC) voltage (URdc)	200 V
series	M49470(FORMED)
size code	3944
Temperature characteristic code	BR
Temperature Coefficient	15% ppm/°C
Terminal surface	Tin/Lead (Sn/Pb)
width	11.18 mm

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KEMET Part Number: L1RJ402395KC65

(87106383)

KPS LDD Comm SMPS, Ceramic, 3.9 uF, 10%, 200 VDC, BR, N/A

General Information

Series:

Style:

Description:

Features:

RoHS:

Prop 65:

Termination:

Lead:

Failure Rate:

Testing and Reliability:

AEC-Q200:

KPS LDD Comm SMPS

Leaded Stacked Chip

Low ESR, High Current Stacked

Ceramic Chips

Low ESR, High Current

WARNING:

Cancer

and reproductive harm -

www.p65warnings.ca.gov.

60/40 Solder Coated

J Leads

N/A

DSCC87106

Note: Number of chips in stack

depends on design. Number of

Chips in this stack = 5. Note:

Turn Radius For Lead Extension

Is 0.1 Radians (Typical). Note:

Lead alignment within pin rows

shall be within ±.0.13 mm.

Dimensions

9.845mm +/-0.955mm

1.78mm +/-0.25mm

1.397mm MAX

2.54mm TYP

0.254mm +/-0.051mm

16.51mm MAX

10.16mm +/-0.635mm

11.18mm +/-0.25mm

1.586mm MAX

0.508mm +/-0.051mm

1.27mm MIN

Notes:

Specifications

Capacitance:

Capacitance Tolerance:

Voltage DC:

Dielectric Withstanding

Voltage:

Temperature Range:

Temperature Coefficient:

Dissipation Factor:

Aging Rate:

Insulation Resistance:

3.9 uF

10%

200 VDC

500 VDC

-55/+125°C

2.5% 1 kHz 25C

1% Loss/Decade Hour

25.6 GOhms

Packaging Specifications

Packaging:

Packaging Quantity:

Waffle, Box

Statements of suitability for certain applications are based on our knowledge of typical operating conditions for such applications, but are not intended to constitute - and

we specifically disclaim - any warranty concerning suitability for a specific customer application or use. This Information is intended for use only by customers who have the

requisite experience and capability to determine the correct products for their application. Any technical advice inferred from this Information or otherwise provided by us

with reference to the use of our products is given gratis, and we assume no obligation or liability for the advice given or results obtained.

Generated 6/08/2022 - cf91fd92-156e-4bfa-a8f1-cde11aae7cd1

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