EEWORLDEEWORLDEEWORLD

Part Number

Search

BU4939FVE

Description
1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5
CategoryPower/power management    The power supply circuit   
File Size267KB,6 Pages
ManufacturerROHM Semiconductor
Websitehttps://www.rohm.com/
Environmental Compliance
Download Datasheet Parametric View All

BU4939FVE Overview

1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5

BU4939FVE Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerROHM Semiconductor
Parts packaging codeSOIC
package instructionVSOF, TSSOP6,.06,20
Contacts5
Reach Compliance Codecompliant
ECCN codeEAR99
Other featuresDETECTION THRESHOLD VOLTAGE IS 3.9V
Adjustable thresholdNO
Analog Integrated Circuits - Other TypesPOWER SUPPLY SUPPORT CIRCUIT
JESD-30 codeR-PDSO-F5
JESD-609 codee2
length1.6 mm
Number of channels1
Number of functions1
Number of terminals5
Maximum operating temperature125 °C
Minimum operating temperature-25 °C
Package body materialPLASTIC/EPOXY
encapsulated codeVSOF
Encapsulate equivalent codeTSSOP6,.06,20
Package shapeRECTANGULAR
Package formSMALL OUTLINE, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height0.6 mm
Minimum supply voltage (Vsup)0.9 V
Nominal supply voltage (Vsup)2.4 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal surfaceTin/Copper (Sn/Cu)
Terminal formFLAT
Terminal pitch0.5 mm
Terminal locationDUAL
Threshold voltage nominal+3.9V
Maximum time at peak reflow temperature10
width1.2 mm
Base Number Matches1
Are there any friends who are familiar with wireless mouse development?
Looking for someone who is familiar with wireless mouse development. I have a similar device and need someone who is familiar with hardware and software to talk to. The product may be outsourced to an...
whimsy Embedded System
FPGA PLL
The FPGA has 4 PLLs, each PLL has 4 inputs, What are the differences between these PLLs? Why so many? They are connected to the global clock, so the functions of these PLLs should be the same, right? ...
tianma123 FPGA/CPLD
I would like to ask the class owner a question about the IO port! Thank you!
Moderator, I have a question.I use PA0~PA7 of GPIOA of STM32F103V8 to connect SRAM data (D0~D7)and make the following settings: GPIOA->CRL = 0x55555555 //01: general open-drain output mode, 01: output...
springmorn stm32/stm8
[GD32E231 DIY Contest]——08. Solution to using JLINK to debug and download GD32E231
[i=s] This post was last edited by xld0932 on 2019-4-26 21:23 [/i] [size=3] The GD32E231 series chips are MCUs based on the ARM Cortex-M23 core designed based on the ARMv8-M baseline architecture. In ...
xld0932 GD32 MCU
2440 What are the most basic header files usually needed or what files do ads projects usually need to include?
For beginners, what are the most basic files that are usually needed to build an ads 2440 project? (After adding these files, all common functions can be realized: including interrupts, uart, ad conve...
ggyggu Embedded System
Learn about the development of FPGA in one article - reducing power consumption and price by 10,000 times
[url=http://xilinx.eetrend.com/news/10909]Original address[/url] [align=left][color=rgb(46, 46, 46)][font=微软雅黑, "][color=#FF8000]Author: Steve Trimberger, Xilinx, Fellow of the Institute of Electrical...
白丁 FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1074  1916  1622  2689  64  22  39  33  55  2 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号