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SEMD4

Description
NPN/PNP Silicon Digital Transistor Array Preliminary data
CategoryDiscrete semiconductor    The transistor   
File Size154KB,5 Pages
ManufacturerInfineon
Websitehttp://www.infineon.com/
Download Datasheet Parametric View All

SEMD4 Overview

NPN/PNP Silicon Digital Transistor Array Preliminary data

SEMD4 Parametric

Parameter NameAttribute value
MakerInfineon
Parts packaging codeSOT
package instructionSMALL OUTLINE, R-PDSO-F6
Contacts6
Manufacturer packaging codeSOT666
Reach Compliance Codeunknow
ECCN codeEAR99
Other featuresBUILT-IN BIAS RESISTOR RATIO IS 1
Maximum collector current (IC)0.1 A
Collector-emitter maximum voltage50 V
ConfigurationSEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR
Minimum DC current gain (hFE)120
JESD-30 codeR-PDSO-F6
JESD-609 codee3
Number of components2
Number of terminals6
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Polarity/channel typeNPN AND PNP
Certification statusNot Qualified
surface mountYES
Terminal surfaceMATTE TIN
Terminal formFLAT
Terminal locationDUAL
transistor applicationsSWITCHING
Transistor component materialsSILICON
Nominal transition frequency (fT)130 MHz
Base Number Matches1
SEMD4
NPN/PNP Silicon Digital Transistor Array
Preliminary data
Switching circuit, inverter, interface circuit,
driver circuit
Two (galvanic) internal isolated NPN/PNP
Transistors in one package
Built in bias resistor (R1=10kΩ)
Tape loading orientation
Top View
3 2 1
4
5
3
6
1
2
Marking on SOT666 package
(for example W R)
corresponds to pin 1 of device
Position in tape: pin 1
same of feed hole
side
C1
6
B2
5
E2
4
R
2
R
1
TR1
R
2
1
2
B1
3
C2
EHA07176
TR2
R
1
4 5 6
Direction of Unreeling
Type
SEMD4
Maximum Ratings
Parameter
Collector-emitter voltage
Collector-base voltage
Emitter-base voltage
Input on Voltage
DC collector current
Total power dissipation,
T
S
= 75 °C
Junction temperature
Storage temperature
Thermal Resistance
Junction - soldering point
1)
1For calculation of
R
thJA
please refer to Application Note Thermal Resistance
WR
E1
Marking
W7
Pin Configuration
Package
1=E1 2=B1 3=C2 4=E2 5=B2 6=C1 SOT666
Symbol
V
CEO
V
CBO
V
EBO
V
i(on)
I
C
P
tot
T
j
T
stg
Value
50
50
5
20
100
250
150
-65 ... 150
Unit
V
mA
mW
°C
R
thJS
300
K/W
1
Feb-26-2004
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