EEWORLDEEWORLDEEWORLD

Part Number

Search

LC21-4-5-0-04

Description
Nominal centre frequency fo: 21.4 MHz
File Size16KB,1 Pages
ManufacturerVectron International, Inc.
Websitehttp://www.vectron.com/
Download Datasheet View All

LC21-4-5-0-04 Overview

Nominal centre frequency fo: 21.4 MHz

02 April 2002
Specification for LC band pass filter:
1. General
1.1. Package:
LC 21.4-5.0/04V1
1.2.
1.3.
1.4.
1.5.
2.
2.1.
2.2.
2.2.1.
2.2.2.
2.2.3.
2.2.4.
2.3.
2.3.1.
2.3.2.
2.3.3.
2.4.
2.5.
Type name:
Number of poles:
Operating temperature range:
Storage temperature range:
Electric values
Nominal centre frequency fo:
Pass band
Bandwidth between 3 dB - frequencies:
Ripple:
Group delay distortion:
Insertion loss:
Stop band
fo 10.0 MHz
fo 15.0 MHz
Alternate attenuation:
Terminating impedance ( input and output ):
Intermodulation
frequency 1 / 2:
input power level :
IM:
Marking:
LC 21.4-5.0/04V1
4
-20°C to +70°C
-40°C to +85°C
21.4 MHz
fo 2.5 MHz
1.5 dB at fo 1.5 MHz
0.15 µs at fo 2.5 MHz
3.0 dB
45 dB
60 dB
60 dB
50
// 0 pF
fo + 200 kHz / fo -200 kHz
0 dBm
70 dB
manufacturer, date code
LC 21.4-5.0/04V1
3.
4.
Environment conditions:
Corresponding to Vectron standard CF001
____________________________________________________________________________________
Edited by:
date: _____________________________ name: _________________________________
In the EMC-related experiments of circuits, there are some voltage pulse experiments. How should the withstand voltage value of the capacitor be considered?
The figure shows the related voltage pulse experiment. It can be seen that in the 12V system, the highest US reaches -150V. So when we choose the input filter capacitor, should we choose the one with ...
小太阳yy Switching Power Supply Study Group
Subject: Ding Junhui: I lost, please don't take it too seriously [Recommended][Fine]
Ding Junhui: I lost, please don't take it tooseriously620)this.style.width=620" vspace=5 border=0When Cupid comes, many people are experiencing happiness, enjoying happiness, and tasting the ups and d...
maker Talking
Regarding Verilog's output, should it be reg type or wire type?
module d_ff ( clk, rst_n, datain, dataout ); input clk; input rst_n; input datain; ouput dataout; reg dataout; always @ (posedge clk) begin if (!rst_n) dataout <= 1'b0; else dataout <= datain; end end...
strongli2008 Embedded System
hhhhhhhhhh
xfdggfhfghfhfg...
wubiwubi1 TI Technology Forum
Can you tell what kind of switch it is from the component diagram?
Is it thisor thisor something else? I don't understand the main circuit diagram and don't know what this switch is used for? Attached picture: Switch on the serial port...
ZNF PCB Design

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2725  1041  2515  2766  1072  55  21  51  56  22 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号