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BUK104-50LP

Description
PowerMOS transistor Logic level TOPFET
CategoryDiscrete semiconductor    The transistor   
File Size108KB,14 Pages
ManufacturerPhilips Semiconductors (NXP Semiconductors N.V.)
Websitehttps://www.nxp.com/
Download Datasheet Parametric Compare View All

BUK104-50LP Overview

PowerMOS transistor Logic level TOPFET

BUK104-50LP Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerPhilips Semiconductors (NXP Semiconductors N.V.)
package instruction,
Reach Compliance Codeunknow
ConfigurationSingle
Maximum drain current (Abs) (ID)13 A
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-609 codee0
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)40 W
surface mountNO
Terminal surfaceTin/Lead (Sn/Pb)
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
DESCRIPTION
Monolithic temperature and
overload protected logic level power
MOSFET in a 5 pin plastic
envelope, intended as a general
purpose switch for automotive
systems and other applications.
BUK104-50L/S
BUK104-50LP/SP
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
tot
T
j
R
DS(ON)
PARAMETER
Continuous drain source voltage
Continuous drain current
Total power dissipation
Continuous junction temperature
Drain-source on-state resistance
V
IS
= 5 V
V
IS
= 7 V
PARAMETER
Protection supply voltage
BUK104-50L
BUK104-50S
MAX.
50
15
40
150
125
100
NOM.
5
10
UNIT
V
A
W
˚C
mΩ
mΩ
UNIT
V
V
APPLICATIONS
General controller for driving
lamps
motors
solenoids
heaters
SYMBOL
V
PSN
FEATURES
Vertical power DMOS output
stage
Low on-state resistance
Logic and protection supply
from separate pin
Low operating supply current
Overload protection against
over temperature
Overload protection against
short circuit load
Latched overload protection
reset by protection supply
Protection circuit condition
indicated by flag pin
5 V logic compatible input level
Separate input pin
for higher frequency drive
ESD protection on input, flag
and protection supply pins
Over voltage clamping for turn
off of inductive loads
Both linear and switching
operation are possible
FUNCTIONAL BLOCK DIAGRAM
PROTECTION SUPPLY
DRAIN
FLAG
O/V
CLAMP
POWER
MOSFET
INPUT
LOGIC AND
PROTECTION
SOURCE
Fig.1. Elements of the TOPFET.
PINNING - SOT263
PIN
1
2
3
4
5
tab
input
flag
drain
protection supply
source
drain
DESCRIPTION
PIN CONFIGURATION
tab
SYMBOL
D
TOPFET
P
F
I
P
1 2345
leadform
263-01
Fig. 2. Type numbers ending with
suffix P refer to leadform 263-01.
S
Fig. 3.
January 1993
1
Rev 1.200

BUK104-50LP Related Products

BUK104-50LP BUK104-50L BUK104-50S BUK104-50SP
Description PowerMOS transistor Logic level TOPFET PowerMOS transistor Logic level TOPFET PowerMOS transistor Logic level TOPFET PowerMOS transistor Logic level TOPFET
Is it Rohs certified? incompatible incompatible incompatible incompatible
Maker Philips Semiconductors (NXP Semiconductors N.V.) Philips Semiconductors (NXP Semiconductors N.V.) Philips Semiconductors (NXP Semiconductors N.V.) Philips Semiconductors (NXP Semiconductors N.V.)
Reach Compliance Code unknow unknow unknow unknow
Configuration Single Single Single Single
Maximum drain current (Abs) (ID) 13 A 13 A 13 A 13 A
FET technology METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
JESD-609 code e0 e0 e0 e0
Operating mode ENHANCEMENT MODE ENHANCEMENT MODE ENHANCEMENT MODE ENHANCEMENT MODE
Maximum operating temperature 150 °C 150 °C 150 °C 150 °C
Polarity/channel type N-CHANNEL N-CHANNEL N-CHANNEL N-CHANNEL
Maximum power dissipation(Abs) 40 W 40 W 40 W 40 W
surface mount NO NO NO NO
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
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