Philips Semiconductors
Product specification
PowerMOS transistor
BUK454-60H
GENERAL DESCRIPTION
N-channel enhancement mode
field-effect power transistor in a
plastic envelope.
The device is intended for use in
automotive applications, Switched
Mode Power Supplies (SMPS),
motor control, welding, DC/DC and
AC/DC converters, and in general
purpose switching applications.
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
tot
T
j
R
DS(ON)
PARAMETER
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance
MAX.
60
41
125
175
38
UNIT
V
A
W
˚C
mΩ
PINNING - TO220AB
PIN
1
2
3
tab
gate
drain
source
drain
DESCRIPTION
PIN CONFIGURATION
tab
SYMBOL
d
g
1 23
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DS
V
DGR
±V
GS
I
D
I
D
I
DM
P
tot
T
stg
T
j
PARAMETER
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage temperature
Junction temperature
CONDITIONS
-
R
GS
= 20 kΩ
-
T
mb
= 25 ˚C
T
mb
= 100 ˚C
T
mb
= 25 ˚C
T
mb
= 25 ˚C
-
-
MIN.
-
-
-
-
-
-
-
- 55
-
MAX.
60
60
30
41
29
164
125
175
175
UNIT
V
V
V
A
A
A
W
˚C
˚C
THERMAL RESISTANCES
SYMBOL PARAMETER
R
th j-mb
R
th j-a
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
CONDITIONS
-
TYP.
-
60
MAX.
1.2
-
UNIT
K/W
K/W
August 1996
1
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
BUK454-60H
STATIC CHARACTERISTICS
T
mb
= 25 ˚C unless otherwise specified
SYMBOL
V
(BR)DSS
V
GS(TO)
I
DSS
I
DSS
I
GSS
R
DS(ON)
PARAMETER
Drain-source breakdown
voltage
Gate threshold voltage
Zero gate voltage drain current
Zero gate voltage drain current
Gate source leakage current
Drain-source on-state
resistance
CONDITIONS
V
GS
= 0 V; I
D
= 0.25 mA
V
DS
= V
GS
; I
D
= 1 mA
V
DS
= 60 V; V
GS
= 0 V; T
j
= 25 ˚C
V
DS
= 60 V; V
GS
= 0 V; T
j
= 125 ˚C
V
GS
=
±30
V; V
DS
= 0 V
V
GS
= 10 V; I
D
= 20 A
MIN.
60
2.1
-
-
-
-
TYP.
-
3.0
1
0.1
10
30
MAX.
-
4.0
10
1.0
100
38
UNIT
V
V
µA
mA
nA
mΩ
DYNAMIC CHARACTERISTICS
T
mb
= 25 ˚C unless otherwise specified
SYMBOL
g
fs
C
iss
C
oss
C
rss
t
d on
t
r
t
d off
t
f
L
d
L
s
PARAMETER
Forward transconductance
Input capacitance
Output capacitance
Feedback capacitance
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
Internal drain inductance
Internal source inductance
CONDITIONS
V
DS
= 25 V; I
D
= 20 A
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz
V
DD
= 30 V; I
D
= 3 A;
V
GS
= 10 V; R
GS
= 50
Ω;
R
gen
= 50
Ω
Measured from drain lead 6 mm
from package to centre of die
Measured from source lead
soldering point to source bond pad
MIN.
7
-
-
-
-
-
-
-
-
-
TYP.
14
900
420
160
15
55
75
60
4.5
7.5
MAX.
-
1600
600
275
30
90
125
100
-
-
UNIT
S
pF
pF
pF
ns
ns
ns
ns
nH
nH
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
T
mb
= 25 ˚C unless otherwise specified
SYMBOL
I
DR
I
DRM
V
SD
t
rr
Q
rr
PARAMETER
Continuous reverse drain
current
Pulsed reverse drain current
Diode forward voltage
Reverse recovery time
Reverse recovery charge
CONDITIONS
-
-
I
F
= 41 A ; V
GS
= 0 V
I
F
= 41 A; -dI
F
/dt = 100 A/µs;
V
GS
= 0 V; V
R
= 30 V
MIN.
-
-
-
-
-
TYP.
-
-
0.95
60
0.30
MAX.
41
164
2.0
-
-
UNIT
A
A
V
ns
µC
AVALANCHE LIMITING VALUE
T
mb
= 25 ˚C unless otherwise specified
SYMBOL
W
DSS
PARAMETER
Drain-source non-repetitive
unclamped inductive turn-off
energy
CONDITIONS
I
D
= 41 A ; V
DD
≤
25 V ;
V
GS
= 10 V ; R
GS
= 50
Ω
MIN.
-
TYP.
-
MAX.
100
UNIT
mJ
August 1996
2
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
BUK454-60H
120
110
100
90
80
70
60
50
40
30
20
10
0
PD%
Normalised Power Derating
10
Zth j-mb / (K/W)
BUK454-60H
D=
1
0.5
0.2
0.1
0.05
0.02
0.01
P
D
t
p
p
D= t
T
0.1
0
20
40
60
80
100
Tmb / C
120
140
0.001
0
1E-05
1E-03
t/s
T
t
1E-01
1E+01
Fig.1. Normalised power dissipation.
PD% = 100
⋅
P
D
/P
D 25 ˚C
= f(T
mb
)
ID%
Normalised Current Derating
Fig.4. Transient thermal impedance.
Z
th j-mb
= f(t); parameter D = t
p
/T
ID / A
20
15
10
BUK474-60H
VGS / V = 9
120
110
100
90
80
70
60
50
40
30
20
10
0
80
70
60
8
50
40
30
20
10
6
5
0
2
4
VDS / V
6
8
10
7
0
20
40
60
80
Tmb / C
100
120
140
0
Fig.2. Normalised continuous drain current.
ID% = 100
⋅
I
D
/I
D 25 ˚C
= f(T
mb
); conditions: V
GS
≥
10 V
ID / A
Fig.5. Typical output characteristics, T
j
= 25 ˚C.
I
D
= f(V
DS
); parameter V
GS
RDS(ON) / Ohm
5
6
7
8
BUK474-60H
VGS / V =
9
1000
BUK454-60H
0.2
100
S
RD
(O
N)
ID
S/
VD
=
tp = 100 us
0.15
0.1
10
DC
1 ms
0.05
10 ms
100 ms
1
1
10
VDS / V
100
0
0
10
20
30
40
ID / A
50
60
70
10
20
80
Fig.3. Safe operating area. T
mb
= 25 ˚C
I
D
& I
DM
= f(V
DS
); I
DM
single pulse; parameter t
p
Fig.6. Typical on-state resistance, T
j
= 25 ˚C.
R
DS(ON)
= f(I
D
); parameter V
GS
August 1996
3
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
BUK454-60H
80
70
60
50
40
30
20
10
0
ID / A
Tj / C =
-40
25
150
BUK474-60H
4
VGS(TO) / V
max.
3
typ.
min.
2
1
0
0
2
4
6
VGS / V
8
10
12
-60
-40
-20
0
20
40
60
Tj / C
80
100
120
140
Fig.7. Typical transfer characteristics.
I
D
= f(V
GS
) ; conditions: V
DS
= 15 V; parameter T
j
gfs / S
20
Fig.10. Gate threshold voltage.
V
GS(TO)
= f(T
j
); conditions: I
D
= 1 mA; V
DS
= V
GS
ID / A
SUB-THRESHOLD CONDUCTION
BUK474-60H
1E-01
1E-02
15
1E-03
2%
typ
98 %
10
1E-04
5
Tj / C =
-40
25
150
1E-05
0
1E-06
0
10
20
30
40
ID / A
50
60
70
80
0
1
2
VGS / V
3
4
Fig.8. Typical transconductance, T
j
= 25 ˚C.
g
fs
= f(I
D
); conditions: V
DS
= 15 V
a
Normalised RDS(ON) = f(Tj)
Fig.11. Sub-threshold drain current.
I
D
= f(V
GS)
; conditions: T
j
= 25 ˚C; V
DS
= V
GS
C / pF
BUK474-60H
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
10000
1000
Ciss
Coss
Crss
-60
-20
20
60
Tj / C
100
140
180
100
0.01
0.1
1
VDS / V
10
100
Fig.9. Normalised drain-source on-state resistance.
a = R
DS(ON)
/R
DS(ON)25 ˚C
= f(T
j
); I
D
= 20 A; V
GS
= 10 V
Fig.12. Typical capacitances, C
iss
, C
oss
, C
rss
.
C = f(V
DS
); conditions: V
GS
= 0 V; f = 1 MHz
August 1996
4
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
BUK454-60H
12
10
8
6
4
2
0
VGS / V
VDS / V = 12
BUK474-60H
120
110
100
90
80
70
60
50
40
30
20
10
0
WDSS%
48
0
10
20
QG / nC
30
40
20
40
60
80
100
Tmb / C
120
140
Fig.13. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
); conditions: I
D
= 41 A; parameter V
DS
IF / A
80
70
60
50
40
30
20
10
0
0
0.5
1
VSDS / V
1.5
2
Tj / C =
-40
25
150
Fig.15. Normalised avalanche energy rating.
W
DSS
% = f(T
mb
); conditions: I
D
= 41 A
BUK474-60H
+
L
VDS
VGS
0
RGS
T.U.T.
R 01
shunt
VDD
-
-ID/100
Fig.14. Typical reverse diode current.
I
F
= f(V
SDS
); conditions: V
GS
= 0 V; parameter T
j
Fig.16. Avalanche energy test circuit.
2
W
DSS
=
0.5
⋅
LI
D
⋅
BV
DSS
/(BV
DSS
−
V
DD
)
August 1996
5
Rev 1.000
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