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BUK9880-55

Description
Aluminum Snap-In Capacitor; Capacitance: 470uF; Voltage: 160V; Case Size: 22x30 mm; Packaging: Bulk
CategoryDiscrete semiconductor    The transistor   
File Size51KB,9 Pages
ManufacturerPhilips Semiconductors (NXP Semiconductors N.V.)
Websitehttps://www.nxp.com/
Environmental Compliance
Download Datasheet Parametric View All

BUK9880-55 Overview

Aluminum Snap-In Capacitor; Capacitance: 470uF; Voltage: 160V; Case Size: 22x30 mm; Packaging: Bulk

BUK9880-55 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerPhilips Semiconductors (NXP Semiconductors N.V.)
package instruction,
Reach Compliance Codeunknow
ConfigurationSingle
Maximum drain current (Abs) (ID)7.5 A
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-609 codee3
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)8.3 W
surface mountYES
Terminal surfaceMatte Tin (Sn)
Philips Semiconductors
Product specification
TrenchMOS™ transistor
Logic level FET
GENERAL DESCRIPTION
N-channel enhancement mode logic
level field-effect power transistor in a
plastic envelope suitable for surface
mounting. The device features very
low on-state resistance and has
integral zener diodes giving ESD
protection. It is intended for use in
automotive and general purpose
switching applications.
BUK9880-55
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
tot
T
j
R
DS(ON)
PARAMETER
Drain-source voltage
Drain current
Total power dissipation
Junction temperature
Drain-source on-state
resistance
V
GS
= 5 V
MAX.
55
7.5
1.8
150
80
UNIT
V
A
W
˚C
mΩ
PINNING - SOT223
PIN
1
2
3
4
gate
drain
source
drain (tab)
DESCRIPTION
PIN CONFIGURATION
4
SYMBOL
d
g
s
1
2
3
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DS
V
DGR
±V
GS
I
D
I
D
I
D
I
DM
P
tot
P
tot
T
stg
, T
j
PARAMETER
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Total power dissipation
Storage & operating temperature
CONDITIONS
-
R
GS
= 20 kΩ
-
T
sp
= 25 ˚C
On PCB in Fig.2
T
amb
= 25 ˚C
On PCB in Fig.2
T
amb
= 100 ˚C
T
sp
= 25 ˚C
T
sp
= 25 ˚C
On PCB in Fig.2
T
amb
= 25 ˚C
-
MIN.
-
-
-
-
-
-
-
-
-
- 55
MAX.
55
55
10
7.5
3.5
2.2
40
8.3
1.8
150
UNIT
V
V
V
A
A
A
A
W
W
˚C
ESD LIMITING VALUE
SYMBOL
V
C
PARAMETER
Electrostatic discharge capacitor
voltage
CONDITIONS
Human body model
(100 pF, 1.5 kΩ)
MIN.
-
MAX.
2
UNIT
kV
April 1998
1
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