NCP1361, NCP1366
Low Power Offline Constant
Current PWM Current-Mode
Controller with/without
High Voltage Startup
Current Source
The NCP1361/66 offers a new solution targeting output power
levels from a few watts up to 20 W in a universal−mains flyback
application. Due to a novel method this new controller offers a
primary−side constant current control, saving secondary−side
components to perform current regulation.
The NCP1361/66 operates in valley−lockout quasi−resonant peak
current mode control mode at nominal load to provide high efficiency.
When the secondary−side power starts diminishing, the switching
frequency naturally increases until a voltage−controlled oscillator
(VCO) takes the lead, synchronizing the MOSFET turn−on in a
drain−source voltage valley. The frequency is thus reduced by
stepping into successive valleys until the number 4 is reached. Beyond
this point, the frequency is linearly decreased in valley−switching
mode until a minimum is hit. Valley lockout during the first four
drain−source valleys prevents erratic discrete jumps and provides
good efficiency in lighter load situations.
Features
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MARKING
DIAGRAMS
8
SOIC−7
CASE 751U
1
TSOP−6
CASE 318G
1
A
L
Y
W
G
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
XXXXX
ALYWX
G
xxxAYWG
G
(Note: Microdot may be in either location)
•
±10%
Current Regulation
•
560 V Startup Current Source
•
No Frequency Clamp, 80 or 110 kHz Maximum Switching
•
•
•
•
•
•
•
•
Frequency Options
Quasi−Resonant Operation with Valley Switching
Operation
Fixed Peak Current & Deep Frequency Foldback @
Light Load Operation.
External Constant Voltage Feedback Adjustment
Cycle by Cycle Peak Current Limit
Built−In Soft−Start
Over & Under Output Voltage Protection
Wide Operation
V
CC
Range (up to 28 V)
Low Start−up Current (2.5
mA
typ.) with NCP1361
ORDERING INFORMATION
See detailed ordering and shipping information on page 25 of
this data sheet.
•
•
•
•
Clamped Gate−drive Output for MOSFET
CS
&
Vs/ZCD
pin Short and Open Protection
Internal Temperature Shutdown
Less than 30 mW No−Load Performance at High Line
with NCP1366 Version
•
These are Pb−Free Devices
Typical Applications
•
Low power ac−dc Adapters for Chargers
•
Ac−dc USB chargers for Cell Phones, Tablets and
Cameras
©
Semiconductor Components Industries, LLC, 2016
February, 2018
−
Rev. 3
1
Publication Order Number:
NCP1361/D
NCP1361, NCP1366
NCP1361
V
CC
1
6
V
S
/ZCD
V
S
/ZCD
FB
GND
2
5
FB
CS
DRV
3
(Top View)
4
CS
DRV
3
4
(Top View)
6
5
V
CC
GND
1
2
NCP1366
8
HV
Figure 1. Pin Connections
Ac
Ac
2
Prim
3
5
Aux
4
5
6
NCP1366
GND
VCC
DRV
CS
FB
8
HV
Vs/ZCD
4
3
2
1
0
Vout
0
Sec
1
0
Figure 2. NCP1366 Typical Application Circuit
Ac
Ac
2
Prim
3
5
Aux
4
5
6
NCP1361
CS
FB
DRV
GND
3
2
1
4
1
Sec
0
Vout
0
Vs/ZCD VCC
0
Figure 3. NCP1361 Typical Application Circuit
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2
NCP1361, NCP1366
I
HV
NCP1366 Only
HV
POReset
Double_Hiccup_ends
V
cc
V
cc(clamp)
R
lim
Latch
VCC and Logic
Management of
double hiccup
UVLO
V
dd
V
CC(Reset)
V
CC(OVP)
DbleHiccup
POReset
EN_UVP
Blanking
QR multi−mode
Valley lockout &
Valley Switching &
VCO management
Reset
Soft Start
SS
Vs /
ZCD
V
ref_CC
Zero Crossing &
Signal Sampling
CC
Control
Sampled V
out
SS
FB_CC
FB_CV
Control Law
&
Primary Peak
Current Control
V
CC(OVP)
OVP
FB
int
V
cc
UVLO
Clamp
S
Q
SCP
OVP_Cmp
V
DD
4 clk
Counter
DRV
R
126% V
ref_CV2
R
FB
Latch
UVP_Cmp
V
UVP
Peak current
Freeze
FB
S
Q
R
POReset
GND
V
CC(Reset)
S
Q
EN_UVP
R
DbleHiccup
V
DD
I
CS
UVP
1/K
comp
FB Reset
I
CS_EN
CS
LEB1
Max_Ipk reset
Count
V
ILIM
POReset
DbleHiccup
LEB2
Reset
Counter
4 clk
Counter
SCP
OCP
Timer
OCP
Reset Timer
Note:
OVP: Over Voltage Protection
UVP: Under Voltage Protection
OCP: Over Current Protection
SCP: Short Circuit Protection
CBC: CaBle Compensation
t
LEB1
> t
LEB2
R
Q
S
V
CS(Stop)
CS pin Open (V
CS
> 2 V)
& Short (V
CS
< 50 mV)
detection is activated at
each startup
CS pin Fault
I
CS_EN
Figure 4. Functional Block Diagram: A Version
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3
NCP1361, NCP1366
PIN FUNCTION DESCRIPTION
Pin out
NCP1366
1
2
3
4
5
6
7
8
Pin out
NCP1361
6
5
4
3
2
1
−
−
Name
V
s
/ZCD
FB
CS
DRV
GND
V
CC
NC
HV
Function
Connected to the auxiliary winding; this pin senses the voltage output for the primary
regulation and detects the core reset event for the Quasi−Resonant mode of operation.
This pin connects to an optocoupler collector and adjusts the peak current setpoint.
This pin monitors the primary peak current.
Controller switch driver.
Ground reference.
This pin is connected to an external auxiliary voltage and supplies the controller.
Not Connected for creepage distance between high and low Voltage pins
Connected the high−voltage rail, this pin injects a constant current into the V
CC
capaci-
tor for starting−up the power supply.
MAXIMUM RATINGS
Symbol
V
CC(MAX)
ΔV
CC
/Δt
V
DRV(MAX)
I
DRV(MAX)
V
MAX
I
MAX
V
HV
R
θJ−A
T
J(MAX)
Rating
Maximum Power Supply voltage, VCC pin, continuous voltage
Maximum slew rate on V
CC
pin during startup phase
Maximum driver pin voltage, DRV pin, continuous voltage
Maximum current for DRV pin
Maximum voltage on low power pins (except pins DRV and VCC)
Current range for low power pins (except pins DRV and VCC)
High Voltage pin voltage
Thermal Resistance Junction−to−Air
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Human Body Model ESD Capability per JEDEC JESD22−A114F
Machine Model ESD Capability (All pins except DRV) per JEDEC JESD22−A115C
Charged−Device Model ESD Capability per JEDEC JESD22−C101E
Value
−0.3
to 28
+0.4
−0.3,
V
DRV
(Note 1)
−300,
+500
−0.3,
5.5
−2,
+5
−0.3
to 560
200
150
−40
to +125
−60
to +150
2
200
500
Unit
V
V/ms
V
mA
V
mA
V
°C/W
°C
°C
°C
kV
V
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. V
DRV
is the DRV clamp voltage V
DRV(high)
when V
CC
is higher than V
DRV(high)
. V
DRV
is V
CC
otherwise
2. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78.
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4
NCP1361, NCP1366
ELECTRICAL CHARACTERISTICS:
(V
CC
= 12 V, C
DRV
= 1 nF, For typical values T
J
= 25°C, for min/max values T
J
=
−40°C
to
+125°C, Max T
J
= 150°C, unless otherwise noted)
Characteristics
Conditions
Symbol
Min
Typ
Max
Unit
HIGH VOLTAGE STARTUP SECTION (NCP1366 only)
Startup current sourced by V
CC
pin
Leakage current at HV
V
HV
= 100 V
V
HV
= 400 V, all options except
NCP1366AABAY and NCP1366BABAY
All other options
I
HV
= 95% of I
HV
@V
HV
= 100 V, V
CC
=
V
CC(on)
−
0.2 V
I
HV
I
HV_LKG
70
100
150
mA
mA
−
−
−
0.1
0.1
22
1.0
1.3
25
Minimum Start−up HV voltage
V
HV(min)
V
SUPPLY SECTION AND V
CC
MANAGEMENT
V
CC
level at which driving
pulses are authorized
V
CC
level at which driving
pulses are stopped
Internal Latch / Logic Reset
Level
V
CC
clamp level
V
CC
clamp level (A & C
version)
Minimal current into V
CC
pin
that keeps the controller
Latched (NCP1366, A & C fault
mode version)
Minimal current into V
CC
pin
that keeps the controller
Latched (NCP1361, A & C fault
mode version)
Current−limit resistor in series
with the latch SCR
Over Voltage Protection
Start−up supply current,
controller disabled or latched
(Only valid with NCP1361 )
Internal IC consumption,
steady state
Internal IC consumption,
frequency foldback mode
Internal IC consumption when
STBY mode is activated
Over Voltage threshold
V
CC
< V
CC(on)
& V
CC
increasing from
0V
F
sw
= 65 kHz, C
DRV
= 1 nF
VCO mode, Fsw = 1 kHz, C
DRV
= 1 nF
VCO mode, Fsw = f
VCO(min)
,
V
Comp
= GND, C
DRV
= 1 nF
f
VCO(min)
= 200 Hz, (options
NCP1366AABAY, NCP1366BABAY,
NCP1361AABAY, NCP1361BABAY and
NCP1361EABAY)
f
VCO(min)
= 200 Hz, all other options
f
VCO(min)
= 600 Hz
f
VCO(min)
= 1.2 kHz
V
Comp
= V
Comp(max)
, V
CS
increasing
Activated after Latch protection @ I
CC
=
100
mA
V
CC
increasing
V
CC
decreasing
V
CC(on)
V
CC(off)
V
CC(reset)
16
6.0
−
18
6.5
5.6
20
7.0
−
V
V
V
V
CC(Clamp)
−
4.2
−
V
I
CC(Clamp)
−
−
20
mA
I
CC(Clamp)
−
−
6
mA
R
lim
V
CC(OVP)
I
CC1
−
24
−
7
26
2.5
−
28
5.0
kW
V
mA
I
CC2
I
CC3
I
CC4
−
−
1.7
0.8
2.5
1.2
mA
mA
mA
−
200
250
−
−
−
470
500
530
520
TBD*
TBD*
CURRENT COMPARATOR
Current Sense Voltage
Threshold
V
ILIM
0.76
0.80
0.84
V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. The timer can be reset if there are 4 DRV cycles without overload or short circuit conditions
4. Guaranteed by Design.
* Characterization upon request
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