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MAX1122

Description
1.8V, Low-Power, 12-Bit, 250Msps ADC for Broadband Applications
File Size388KB,21 Pages
ManufacturerMaxim
Websitehttps://www.maximintegrated.com/en.html
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MAX1122 Overview

1.8V, Low-Power, 12-Bit, 250Msps ADC for Broadband Applications

19-0537; Rev 0; 4/06
KIT
ATION
EVALU
BLE
AVAILA
1.8V, Low-Power, 12-Bit, 250Msps
ADC for Broadband Applications
General Description
Features
o
250Msps Conversion Rate
o
Excellent Low-Noise Characteristics
SNR = 66.7dB at f
IN
= 100MHz
SNR = 65.6dB at f
IN
= 250MHz
o
Excellent Dynamic Range
SFDR = 84.7dBc at f
IN
= 100MHz
SFDR = 80dBc at f
IN
= 250MHz
o
Single 1.8V Supply
o
886mW Power Dissipation at f
SAMPLE
= 250Msps
and f
IN
= 100MHz
o
On-Chip Track-and-Hold Amplifier
o
Internal 1.25V-Bandgap Reference
o
On-Chip Selectable Divide-by-2 Clock Input
o
LVDS Digital Outputs with Data Clock Output
o
MAX1215NEVKIT Available
MAX1215N
The MAX1215N is a monolithic, 12-bit, 250Msps ana-
log-to-digital converter (ADC) optimized for outstanding
dynamic performance at high-IF frequencies beyond
300MHz. The product operates with conversion rates
up to 250Msps while consuming only 886mW.
At 250Msps and an input frequency of 100MHz, the
MAX1215N achieves an 84.7dBc spurious-free dynam-
ic range (SFDR) with e6.7dB signal-to-noise ratio (SNR)
that remains flat (within 2dB) for input tones up to
250MHz. This makes it ideal for wideband applications
such as communications receivers, cable-head end
receivers, and power-amplifier predistortion in cellular
base-station transceivers (BTS).
The MAX1215N operates from a single 1.8V power sup-
ply. The analog input is designed for AC-coupled differ-
ential or single-ended operation. The ADC also features a
selectable on-chip divide-by-2 clock circuit that accepts
clock frequencies as high as 500MHz. A low-voltage dif-
ferential signal (LVDS) sampling clock is recommended
for best performance. The converter provides LVDS-com-
patible digital outputs with data format selectable to be
either two’s complement or offset binary.
The MAX1215N is available in a 68-pin QFN package
with exposed paddle (EP) and is specified over the indus-
trial (-40°C to +85°C) temperature range.
See the
Pin-Compatible Versions
table for a complete
selection of 8-bit, 10-bit, and 12-bit high-speed ADCs
in this family.
Ordering Information
PART
MAX1215NEGK-D
MAX1215NEGK+D
TEMP RANGE
PIN-
PACKAGE
PKG
CODE
-40°C to +85°C 68 QFN-EP* G6800-4
-40°C to +85°C 68 QFN-EP* G6800-4
*EP
= Exposed paddle.
+Denotes
lead-free package.
D = Dry pack.
Applications
Base-Station Power-Amplifier Linearization
Cable-Head End Receivers
Wireless and Wired Broadband Communications
Communications Test Equipment
Radar and Satellite Subsystems
MAX1121
MAX1122
MAX1123
MAX1124
MAX1213
MAX1214
MAX1215
MAX1213N
MAX1214N
PART
RESOLUTION
(BITS)
8
10
10
10
12
12
12
12
12
12
Pin-Compatible Versions
SPEED
GRADE
(Msps)
250
170
210
250
170
210
250
170
210
250
ON-CHIP
BUFFER
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
Pin Configuration appears at end of data sheet.
MAX1215N
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

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