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8312I

Description
CLK input supports the following input types
File Size214KB,18 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
Download Datasheet View All

8312I Overview

CLK input supports the following input types

Low Skew, 1-to-12 LVCMOS/LVTTL
Fanout Buffer
8312I
DATASHEET
General Description
The 8312I is a low skew, 1-to-12 LVCMOS/ LVTTL Fanout Buffer
and a member of the HiPerClockS™ family of High Performance
Clock Solutions from IDT. The 8312I single-ended clock input
accepts LVCMOS or LVTTL input levels. The low impedance
LVCMOS outputs are designed to drive 50 series or parallel
terminated transmission lines. The effective fanout can be
increased from 12 to 24 by utilizing the ability of the outputs to
drive two series terminated lines.
The 8312I is characterized at full 3.3V, 2.5V, and 1.8V, mixed
3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating supply
modes. Guaranteed output and part-to-part skew characteristics
along with the 1.8V output capabilities makes the 8312I ideal for
high performance, single ended applications that also require a
limited output voltage.
Features
Twelve LVCMOS/LVTTL outputs
CLK input supports the following input types: LVCMOS, LVTTL
Maximum output frequency: 250MHz
Output skew: 160ps (maximum)
Supply modes:
Core/Output
3.3V/3.3V
3.3V/2.5V
3.3V/1.8V
2.5V/2.5V
2.5V/1.8V
1.8V/1.8V
-40°C to 85°C ambient operating temperature
Available in lead-free (RoHS 6) package
Block Diagram
CLK_EN
Pullup
Pin Assignment
GND
D
Q
LE
GND
V
DD
CLK_EN
12
32 31 30 29 28 27 26 25
1
2
3
4
5
6
7
8
9
Q11
Q1
GND
V
DDO
V
DDO
Q2
Q3
Q0
24
23
22
21
20
19
18
17
10 11 12 13 14 15 16
GND
V
DDO
V
DDO
GND
Q10
Q9
Q8
Q4
V
DDO
Q5
GND
Q6
V
DDO
Q7
GND
CLK
Pulldown
Q[0:11]
CLK
GND
OE
OE
Pullup
V
DD
GND
8312I
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
8312I Rev B 11/4/14
1
©2014 Integrated Device Technology, Inc.
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