INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
•
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4016
Quad bilateral switches
Product specification
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors
Product specification
Quad bilateral switches
FEATURES
•
Low “ON” resistance:
160
Ω
(typ.) at V
CC
= 4.5 V
120
Ω
(typ.) at V
CC
= 6.0 V
80
Ω
(typ.) at V
CC
= 9.0 V
•
Individual switch controls
•
Typical “break before make” built in
•
Output capability: non-standard
•
I
CC
category: SSI
GENERAL DESCRIPTION
The 74HC/HCT4016 are high-speed Si-gate CMOS
devices and are pin compatible with the “4016” of the
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
= 6 ns
74HC/HCT4016
“4000B” series. They are specified in compliance with
JEDEC standard no. 7A.
The 74HC/HCT4016 have four independent analog
switches (transmission gates).
Each switch has two input/output terminals (Y
n
, Z
n
) and an
active HIGH enable input (E
n
). When E
n
is connected to
V
CC
, a low bidirectional path between Y
n
and Z
n
is
established (ON condition). When E
n
is connected to
ground (GND), the switch is disabled and a high
impedance between Y
n
and Z
n
is established (OFF
condition).
Current through a switch will not cause additional
V
CC
current provided the voltage at the terminals of the
switch is maintained within the supply voltage range;
V
CC
>> (V
Y
, V
Z
) >> GND. Inputs Y
n
and Z
n
are electrically
equivalent terminals.
TYPICAL
SYMBOL
t
PZH
/ t
PZL
t
PHZ
/ t
PLZ
C
I
C
PD
C
S
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW):
P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
{ (C
L
+
C
S
)
×
V
CC2
×
f
o
} where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑
{(C
L
+
C
S
)
×
V
CC2
×
f
o
} = sum of outputs
C
L
= output load capacitance in pF
C
S
= max. switch capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
−
1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
PARAMETER
turn “ON” time E
n
to V
OS
turn “OFF” time E
n
to V
OS
input capacitance
power dissipation capacitance per switch
max. switch capacitance
notes 1 and 2
CONDITIONS
HC
C
L
= 15 pF; R
L
= 1 kΩ;
V
CC
= 5 V
16
14
3.5
12
5
HCT
17
20
3.5
12
5
ns
ns
pF
pF
pF
UNIT
December 1990
2
Philips Semiconductors
Product specification
Quad bilateral switches
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Voltages are referenced to GND (ground = 0 V)
SYMBOL
V
CC
±I
IK
±I
SK
±I
S
±I
CC
;
±I
GND
T
stg
P
tot
PARAMETER
DC supply voltage
DC digital input diode current
DC switch diode current
DC switch current
DC V
CC
or GND current
storage temperature range
power dissipation per package
plastic DIL
plastic mini-pack (SO)
P
S
power dissipation per switch
750
500
100
mW
mW
mW
−65
MIN.
−0.5
MAX.
+11.0
20
20
25
50
+150
UNIT
V
mA
mA
mA
mA
°C
CONDITIONS
74HC/HCT4016
for V
I
< −0.5
V or V
I
>
V
CC
+
0.5 V
for V
S
< −0.5
V or V
S
>
V
CC
+
0.5 V
for
−0.5
V
<
V
S
<
V
CC
+
0.5 V
for temperature range:
−40
to
+125 °C
74HC/HCT
above
+70 °C:
derate linearly with 12 mW/K
above
+70 °C:
derate linearly with 8 mW/K
RECOMMENDED OPERATING CONDITIONS
74HC
SYMBOL PARAMETER
min. typ. max. min. typ. max.
V
CC
V
I
V
S
T
amb
T
amb
DC supply voltage
DC input voltage range
DC switch voltage range
operating ambient temperature range
operating ambient temperature range
2.0
GND
GND
−40
−40
5.0
10.0
V
CC
V
CC
+85
+125
1000
t
r
, t
f
input rise and fall times
6.0
500
400
250
6.0
500
ns
4.5
GND
GND
−40
−40
5.0
5.5
V
CC
V
CC
+85
V
V
V
°C
see DC and AC
CHARACTERIS-
TICS
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
CC
= 10.0 V
74HCT
UNIT
CONDITIONS
+125 °C
December 1990
5