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W29GL032C_13: Description32M-BIT 3.0-VOLT PARALLEL FLASH MEMORY WITH PAGE MODE; File Size641KB，68 Pages; ManufacturerWinbond Electronics Corporation; Websitehttp://www.winbond.com.tw

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32M-BIT 3.0-VOLT PARALLEL FLASH MEMORY WITH PAGE MODE

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W29GL032C

32M-BIT

3.0-VOLT PARALLEL FLASH MEMORY WITH

PAGE MODE

Publication Release Date: August 2, 2013

Revision H

W29GL032C

Table of Contents

GENERAL DESCRIPTION ......................................................................................................... 1

FEATURES ................................................................................................................................. 1

PIN CONFIGURATIONS............................................................................................................. 2

BLOCK DIAGRAM ...................................................................................................................... 3

PIN DESCRIPTION ..................................................................................................................... 3

ARRAY ARCHITECTURE........................................................................................................... 4

6.1

H/L Sector Address Table ............................................................................................... 4

6.2

Top Sector Address Table .............................................................................................. 4

6.3

Bottom Sector Address Table ......................................................................................... 4

FUNCTIONAL DESCRIPTION.................................................................................................... 5

7.1

Device Bus Operation ..................................................................................................... 5

7.2

Instruction Definitions...................................................................................................... 6

7.2.1

7.2.2

7.2.3

7.2.4

7.2.5

7.2.6

7.2.7

7.2.8

7.2.9

7.2.10

7.2.11

7.2.12

7.2.13

7.2.14

7.2.15

7.2.16

7.2.17

7.2.18

7.2.19

7.2.20

7.2.21

7.2.22

7.2.23

Reading Array Data .......................................................................................................... 6

Page Mode Read .............................................................................................................. 6

Device Reset Operation .................................................................................................... 7

Standby Mode ................................................................................................................... 7

Output Disable Mode ........................................................................................................ 7

Write Operation ................................................................................................................. 7

Byte/Word Selection ......................................................................................................... 8

Automatic Programming of the Memory Array .................................................................. 8

Erasing the Memory Array ................................................................................................ 9

Erase Suspend/Resume ............................................................................................... 10

Sector Erase Resume ................................................................................................... 10

Program Suspend/Resume ........................................................................................... 11

Program Resume .......................................................................................................... 11

Programming Operation ................................................................................................ 11

Buffer Write Abort ......................................................................................................... 12

Accelerated Programming Operation ............................................................................ 12

Automatic Select Bus Operation ................................................................................... 12

Automatic Select Operations......................................................................................... 13

Automatic Select Instruction Sequence ........................................................................ 13

Enhanced Variable IO (EVIO) Control .......................................................................... 14

Hardware Data Protection Options ............................................................................... 14

Inherent Data Protection ............................................................................................... 14

Power Supply Decoupling ............................................................................................. 14

Lock Register .................................................................................................................. 16

Individual (Non-Volatile) Protection Mode ....................................................................... 17

Factory Locked: Security Sector Programmed and Protected at factory......................... 20

Customer Lockable: Security Sector Not Programmed or Protected .............................. 20

7.3

Enhanced Sector Protect/Un-protect ............................................................................ 15

7.3.1

7.3.2

7.4

Security Sector Flash Memory Region ......................................................................... 20

7.4.1

7.4.2

7.5

Instruction Definition Tables ......................................................................................... 21

Publication Release Date: August 2, 2013

Revision H

W29GL032C

7.6

Common Flash Memory Interface (CFI) Mode ............................................................. 25

7.6.1

Query Instruction and Common Flash memory Interface (CFI) Mode ............................. 25

ELECTRICAL CHARACTERISTICS ......................................................................................... 29

8.1

Absolute Maximum Stress Ratings ............................................................................... 29

8.2

Operating Temperature and Voltage ............................................................................ 29

8.3

DC Characteristics ........................................................................................................ 30

8.4

Switching Test Circuits.................................................................................................. 31

8.4.1

Switching Test Waveform ............................................................................................... 31

Instruction Write Operation ............................................................................................. 33

Read / Reset Operation .................................................................................................. 34

Erase/Program Operation ............................................................................................... 36

Write Operation Status .................................................................................................... 46

WORD/BYTE CONFIGURATION (#BYTE)..................................................................... 50

DEEP POWER DOWN MODE........................................................................................ 52

WRITE BUFFER PROGRAM.......................................................................................... 52

At Device Power-up ........................................................................................................ 53

8.5

AC Characteristics ........................................................................................................ 32

8.5.1

8.5.2

8.5.3

8.5.4

8.5.5

8.5.6

8.5.7

8.6

Recommended Operating Conditions........................................................................... 53

8.6.1

8.7

Erase and Programming Performance ......................................................................... 54

8.8

Data Retention .............................................................................................................. 54

8.9

Latch-up Characteristics ............................................................................................... 54

8.10 Pin Capacitance ............................................................................................................ 54

PACKAGE DIMENSIONS ......................................................................................................... 55

9.1

TSOP 48-pin 12x20mm ................................................................................................ 55

9.2

TSOP 56-pin 14x20mm ................................................................................................ 56

9.3

Low-Profile Fine-Pitch Ball Grid Array, 64-ball 11x13mm (LFBGA64) ......................... 57

9.4

Thin & Fine-Pitch Ball Grid Array, 6x8 mm

, pitch: 0.8 mm,

∅=0.4mm

(TFBGA48) .... 58

ORDERING INFORMATION..................................................................................................... 59

10.1 Ordering Part Number Definitions................................................................................. 59

10.2 Valid Part Numbers and Top Side Marking .................................................................. 60

HISTORY .................................................................................................................................. 61

W29GL032C

List of Figures

Figure 3-1

Figure 3-2

Figure 3-3

Figure 3-4

Figure 4-1

Figure 7-1

Figure 7-2

Figure 7-3

Figure 8-1

Figure 8-2

Figure 8-3

Figure 8-4

Figure 8-5

Figure 8-6

Figure 8-7

Figure 8-8

Figure 8-9

Figure 8-10

Figure 8-11

Figure 8-12

Figure 8-13

Figure 8-14

Figure 8-15

Figure 8-16

Figure 8-17

Figure 8-18

Figure 8-19

Figure 8-20

Figure 8-21

Figure 8-22

Figure 8-23

Figure 8-24

Figure 8-25

Figure 8-26

Figure 8-27

Figure 8-28

Figure 9-1

Figure 9-2

Figure 9-3

Figure 9-4

Figure 10-1

LFBGA64 TOP VIEW (FACE DOWN) ........................................................................... 2

56-PIN STANDARD TSOP (TOP VIEW) ........................................................................ 2

TFBGA48 TOP VIEW (FACE DOWN) ............................................................................ 2

48-PIN STANDARD TSOP (TOP VIEW) ........................................................................ 2

Block Diagram................................................................................................................. 3

Enhanced Sector Protect/Un-protect IPB Program Algorithm ...................................... 15

Lock Register Program Algorithm ................................................................................. 16

IPB Program Algorithm ................................................................................................. 18

Maximum Negative Overshoot ..................................................................................... 29

Maximum Positive Overshoot ....................................................................................... 29

Switch Test Circuit ........................................................................................................ 31

Switching Test Waveform ............................................................................................. 31

Instruction Write Operation Waveform.......................................................................... 33

Read Timing Waveform ................................................................................................ 34

#RESET Timing Waveform ........................................................................................... 35

Automatic Chip Erase Timing Waveform ...................................................................... 36

Automatic Chip Erase Algorithm Flowchart .................................................................. 37

Automatic Sector Erase Timing Waveform ................................................................... 38

Automatic Sector Erase Algorithm Flowchart ............................................................... 39

Erase Suspend/Resume Flowchart .............................................................................. 40

Automatic Program Timing Waveform .......................................................................... 41

Accelerated Program Timing Waveform ....................................................................... 41

#CE Controlled Write Timing Waveform ....................................................................... 42

#WE Controlled Write Timing Waveform ...................................................................... 43

Automatic Programming Algorithm Flowchart .............................................................. 44

Silicon ID Read Timing Waveform ................................................................................ 45

Data# Polling Timing Waveform (During Automatic Algorithms) .................................. 46

Status Polling for Word Programming/Erase ................................................................ 47

Status Polling for Write Buffer Program Flowchart ....................................................... 48

Toggling Bit Timing Waveform (During Automatic Algorithms) .................................... 49

Toggle Bit Algorithm...................................................................................................... 50

#BYTE Timing Waveform For Read operations ........................................................... 51

Page Read Timing Waveform....................................................................................... 51

Deep Power Down mode Waveform ............................................................................ 52

Write Buffer Program Flowchart ................................................................................... 52

AC Timing at Device Power-Up .................................................................................... 53

TSOP 48-pin 12x20mm ................................................................................................ 55

TSOP 56-pin 14x20mm ................................................................................................ 56

LFBGA 64-ball 11x13mm ............................................................................................. 57

TFBGA 48-Ball 6x8mm ................................................................................................. 58

Ordering Part Numbering .............................................................................................. 59

iii

Publication Release Date: August 2, 2013

Revision H

W29GL032C_13 Related Products

	W29GL032C_13	W29GL032CH7S	W29GL032CT7T	W29GL032CL7S	W29GL032CH7A	W29GL032CL7A	W29GL032CB7T
Description	32M-BIT 3.0-VOLT PARALLEL FLASH MEMORY WITH PAGE MODE	32M-BIT 3.0-VOLT PARALLEL FLASH MEMORY WITH PAGE MODE	32M-BIT 3.0-VOLT PARALLEL FLASH MEMORY WITH PAGE MODE	32M-BIT 3.0-VOLT PARALLEL FLASH MEMORY WITH PAGE MODE	32M-BIT 3.0-VOLT PARALLEL FLASH MEMORY WITH PAGE MODE	32M-BIT 3.0-VOLT PARALLEL FLASH MEMORY WITH PAGE MODE	32M-BIT 3.0-VOLT PARALLEL FLASH MEMORY WITH PAGE MODE

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