1.8V SERIAL FLASH MEMORY WITH 133MHZ MULTI I/O SPI &
QUAD I/O QPI DTR INTERFACE
ADVANCED DATA SHEET
ADVANCED INFORMATION
IS25WP016/080/040/020
16/8/4/2MBIT
1.8V SERIAL FLASH MEMORY WITH 133MHZ MULTI I/O SPI &
QUAD I/O QPI DTR INTERFACE
ADVANCED INFORMATION
FEATURES
Industry Standard Serial Interface
-
IS25WP016: 16Mbit/2Mbyte
-
IS25WP080: 8Mbit/1Mbyte
-
IS25WP040: 4Mbit/512Kbyte
-
IS25WP020: 2Mbit/256Kbyte
-
256 bytes per Programmable Page
-
Supports standard SPI, Fast, Dual, Dual
I/O, Quad, Quad I/O, SPI DTR, Dual I/O
DTR, Quad I/O DTR, and QPI
-
Supports Serial Flash Discoverable
Parameters (SFDP)
High Performance Serial Flash (SPI)
-
50MHz Normal and 133Mhz Fast Read
-
532 MHz equivalent QPI
-
DTR (Dual Transfer Rate) up to 66MHz
-
Selectable dummy cycles
-
Configurable drive strength
-
Supports SPI Modes 0 and 3
-
More than 100,000 erase/program cycles
-
More than 20-year data retention
Flexible & Efficient Memory Architecture
-
Chip Erase with Uniform: Sector/Block
Erase (4K/32K/64Kbyte)
-
Program 1 to 256 bytes per page
-
Program/Erase Suspend & Resume
Efficient Read and Program modes
-
Low Instruction Overhead Operations
-
Continuous Read 8/16/32/64-Byte burst
-
Selectable burst length
-
QPI for reduced instruction overhead
-
AutoBoot operation
Low Power with Wide Temp. Ranges
-
Single 1.65V to 1.95V Voltage Supply
-
10 mA Active Read Current
-
8 µA Standby Current
-
1 µA Deep Power Down
-
Temp Grades:
Extended: -40°C to +105°C
Extended+: -40°C to +125°C
Auto Grade: up to +125°C
Advanced Security Protection
-
Software and Hardware Write Protection
-
Power Supply lock protect
-
4x256-Byte dedicated security area
with user-lockable bits, (OTP) One
Time Programmable Memory
-
128 bit Unique ID for each device
Industry Standard Pin-out & Packages
(3)
-
JM =16-pin SOIC 300mil
-
JB = 8-pin SOIC 208mil
-
JN = 8-pin SOIC 150mil
-
JD = 8-pin TSSOP 150mil
-
JV = 8-pin VVSOP 150mil
-
JF = 8-pin VSOP 208mil
-
JK = 8-contact WSON 6x5mm
-
JT = 8-contact USON 4x3mm
-
JU = 8-contact USON 2x3mm
-
JG = 24-ball TFBGA 6x8mm
(2)
-
JC = 8-ball WLCSP BGA 2x2.7mm
-
KGD (Call Factory)
(1)
Notes:
1. IS25WP016 (not available in JD, JV) and
IS25WP080/040 (not available in JM, JD, JV, JG) and
IS25WP020 (not available in JM, JF, JT, JG)
2. Call Factory for WLCSP package (only available for
IS25WP016) or other package options available
3. For the additional RESET# pin option, see the
Ordering Information
Integrated Silicon Solution, Inc.- www.issi.com
Rev. 00A
01/13/2015
2
ADVANCED INFORMATION
IS25WP016/080/040/020
GENERAL DESCRIPTION
The IS25WP016/080/040/020 Serial Flash memory offers a versatile storage solution with high flexibility and
performance in a simplified pin count package. ISSI’s “Industry Standard Serial Interface” Flash is for systems
that require limited space, a low pin count, and low power consumption. The device is accessed through a 4-
wire SPI Interface consisting of a Serial Data Input (SI), Serial Data Output (SO), Serial Clock (SCK), and Chip
Enable (CE#) pins, which can also be configured to serve as multi-I/O (see pin descriptions).
The device supports Dual and Quad I/O as well as standard, Dual Output, and Quad Output SPI. Clock
frequencies of up to 133MHz allow for equivalent clock rates of up to 532MHz (133MHz x 4) allowing more than
66Mbytes/s of data throughput. The IS25xP series of Flash adds support for DTR (Double Transfer Rate)
commands that transfer addresses and read data on both edges of the clock. These transfer rates can
outperform 16-bit Parallel Flash memories allowing for efficient memory access to support XIP (execute in
place) operation.
The memory array is organized into programmable pages of 256-bytes. This family supports page program
mode where 1 to 256 bytes of data are programmed in a single command. QPI (Quad Peripheral Interface)
supports 2-cycle instruction further reducing instruction times. Pages can be erased in groups of 4Kbyte
sectors, 32Kbyte blocks, 64Kbyte blocks, and/or the entire chip. The uniform sector and block architecture
allows for a high degree of flexibility so that the device can be utilized for a broad variety of applications
requiring solid data retention.
GLOSSARY
Standard SPI
In this operation, a 4-wire SPI Interface is utilized, consisting of Serial Data Input (SI), Serial Data Output (SO),
Serial Clock (SCK), and Chip Enable (CE#) pins. Instructions are sent via the SI pin to encode instructions,
addresses, or input data to the device on the rising edge of SCK. The DO pin is used to read data or to check
the status of the device on the falling edge of SCK. This device supports SPI bus operation modes (0,0) and
(1,1).
Mutil I/O SPI
Multi-I/O operation utilizes an enhanced SPI protocol to allow the device to function with Dual Output, Dual Input
and Output, Quad Output, and Quad Input and Output capability. Executing these instructions through SPI
mode will achieve double or quadruple the transfer bandwidth for READ and PROGRAM operations.
Quad I/O QPI
The device enables QPI protocol by issuing an “Enter QPI mode (35h)” command. The QPI mode uses four IO
pins for input and output to decrease SPI instruction overhead and increase output bandwidth. SI and SO pins
become bidirectional IO0 and IO1, and WP# and HOLD# pins become IO2 and IO3 respectively during QPI
mode. Issuing an “Exit QPI (F5h) command will cause the device to exit QPI mode. Power Reset or
Hardware/Software Reset can also return the device into the standard SPI mode.
DTR
In addition to SPI and QPI features, the device also supports SPI DTR READ. SPI DTR allows high data
throughput while running at lower clock frequencies. SPI DTR READ mode uses both rising and falling edges of
the clock to drive output, resulting in reducing input and output cycles by half.
Programmable drive strength and Selectable burst setting.
The device offers programmable output drive strength and selectable burst (wrap) length features to increase
the efficiency and performance of READ operation. The driver strength and burst setting features are controlled
by setting the Read Registers. A total of six different drive strengths and four different burst sizes (8/16/32/64
Bytes) are available for selection.
Integrated Silicon Solution, Inc.- www.issi.com
Rev. 00A
01/13/2015
3
ADVANCED INFORMATION
IS25WP016/080/040/020
TABLE OF CONTENTS
FEATURES .......................................................................................................................................................... 2
GENERAL DESCRIPTION .................................................................................................................................. 3
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Embedded System
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