SB130 datasheet, PDF - EEWORLD Datasheet

SB130: Description1 A, 30 V, SILICON, SIGNAL DIODE, DO-41; Categorysemiconductor Discrete semiconductor; File Size121KB，2 Pages; ManufacturerTransys Electronics Limited; Websitehttp://www.transyselectronics.com

Download Datasheet Compare View All

SB130 Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	SB130	-	-	View	Buy Now

1 A, 30 V, SILICON, SIGNAL DIODE, DO-41

	SB130	SB180	SB160	SB150	SB140	SB120
Description	1 A, 30 V, SILICON, SIGNAL DIODE, DO-41	1 A, 80 V, SILICON, SIGNAL DIODE, DO-41	1 A, 60 V, SILICON, SIGNAL DIODE, DO-41	1 A, 50 V, SILICON, SIGNAL DIODE, DO-204AL	1 A, 40 V, SILICON, SIGNAL DIODE, DO-41	1 A, 20 V, SILICON, SIGNAL DIODE, DO-41

ProtelDXP2004SP2 most classic tutorial: The most classic tutorial of ProtelDXP2004SP2, I hope you like it...; szjhtx PCB Design

Is the installation method of the same filter driver in winxp the same as that in win2000?: Now I am developing a USB filter driver. The general process is as follows: set the access password for USB and put it in Shoushan District, and encrypt Shoushan District. When the USB disk is inserte...; cnnbxc Embedded System

Startup launches 1.5GHz FPGA, targeting $1 billion market: Achronix Semiconductor has begun sampling its 1.5GHz FPGA using asynchronous circuits, which the company hopes will replace ASIC products in high-end communications, testing and other high-end markets...; eeleader FPGA/CPLD

Ofo smart lock password problem: As for the first generation ofo's mechanical lock, we all know that it has a fixed password. The password is fixed for the same bike, so it is possible that a child can know the password through the i...; wateras1 DIY/Open Source Hardware

A novice asked a question about the if statement in C language: I am a novice who has just started to use microcontrollers. I bought an OLED and found this paragraph when I was reading the document. Why can I write it like this if (IIC_Byte&0x80)? I can understand...; grove_armweak MCU

About ISE calling IP core: I have just started learning FPGA and I am using ISE9.1. I want to use DDS to generate SIN or COS signals. The calling program is as follows. The behavioral simulation has no results and no errors. Th...; 309075576 FPGA/CPLD

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components