PSMN165-200K
N-channel TrenchMOS SiliconMAX standard level FET
Rev. 02 — 3 December 2009
Product data sheet
1. Product profile
1.1 General description
SiliconMAX standard level N-channel enhancement mode Field-Effect Transistor (FET) in
a plastic package using TrenchMOS technology. This product is designed and qualified for
use in computing, communications, consumer and industrial applications only.
1.2 Features and benefits
Low conduction losses due to low
on-state resistance
Suitable for high frequency
applications due to fast switching
characteristics
1.3 Applications
Computer motherboards
DC-to-DC convertors
Switched-mode power supplies
1.4 Quick reference data
Table 1.
V
DS
I
D
P
tot
Quick reference
Conditions
T
sp
= 80 °C;
see
Figure 1
and
3
T
sp
= 80 °C;
see
Figure 2
V
GS
= 10 V; I
D
= 3 A;
V
DS
= 100 V; T
j
= 25 °C;
see
Figure 11
V
GS
= 10 V; I
D
= 2.5 A;
T
j
= 25 °C;
see
Figure 9
and
10
Min
-
-
-
Typ
-
-
-
Max
200
2.9
3.5
Unit
V
A
W
drain-source voltage T
j
≥
25 °C; T
j
≤
150 °C
drain current
total power
dissipation
gate-drain charge
Symbol Parameter
Dynamic characteristics
Q
GD
-
12
16.5
nC
Static characteristics
R
DSon
drain-source
on-state resistance
-
130
165
mΩ
NXP Semiconductors
PSMN165-200K
N-channel TrenchMOS SiliconMAX standard level FET
2. Pinning information
Table 2.
Pin
1
2
3
4
5
6
7
8
S
S
S
G
D
D
D
D
Pinning information
Symbol
Description
source
source
source
gate
drain
drain
drain
drain
1
4
mbb076
Simplified outline
8
5
Graphic symbol
D
G
S
SOT96-1 (SO8)
3. Ordering information
Table 3.
Ordering information
Package
Name
PSMN165-200K
SO8
Description
plastic small outline package; 8 leads; body width 3.9 mm
Version
SOT96-1
Type number
4. Limiting values
Table 4.
Symbol
V
DS
V
GS
I
D
I
DM
P
tot
T
stg
T
j
I
S
I
SM
Limiting values
Parameter
drain-source voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
T
sp
= 80 °C
T
sp
= 25 °C; t
p
≤
10 µs; pulsed
T
sp
= 80 °C; see
Figure 1
and
3
T
sp
= 25 °C; t
p
≤
10 µs; pulsed
T
sp
= 80 °C; see
Figure 2
Conditions
T
j
≥
25 °C; T
j
≤
150 °C
Min
-
-20
-
-
-
-55
-55
-
-
Max
200
20
2.9
20
3.5
150
150
3.1
20
Unit
V
V
A
A
W
°C
°C
A
A
In accordance with the Absolute Maximum Rating System (IEC 60134).
Source-drain diode
PSMN165-200K_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 3 December 2009
2 of 12
NXP Semiconductors
PSMN165-200K
N-channel TrenchMOS SiliconMAX standard level FET
120
I
der
(%)
80
03aa25
120
P
der
(%)
80
03aa17
40
40
0
0
50
100
150
T
sp
(°C)
200
0
0
50
100
150
T
sp
(°C)
200
Fig 1.
Normalized continuous drain current as a
function of solder point temperature
10
2
I
D
(A)
10
R
DSon
= V
DS
/I
D
Fig 2.
Normalized total power dissipation as a
function of solder point temperature
03ae06
t
p
= 10 µs
100 µs
1 ms
1
P
δ
=
t
p
T
10 ms
D.C.
100 ms
10
−1
t
p
t
T
10
−2
1
10
10
2
V
DS
(V)
10
3
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PSMN165-200K_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 3 December 2009
3 of 12
NXP Semiconductors
PSMN165-200K
N-channel TrenchMOS SiliconMAX standard level FET
5. Thermal characteristics
Table 5.
Symbol
R
th(j-sp)
Thermal characteristics
Parameter
Conditions
Min
-
Typ
-
Max
20
Unit
K/W
thermal resistance from mounted on a metal clad substrate;
junction to solder point see
Figure 4
10
2
Z
th(j-sp)
(K/W)
10
δ
= 0.5
0.2
0.1
0.05
0.02
P
03ae05
1
δ
=
t
p
T
10
−1
single pulse
t
p
t
T
10
−2
10
−4
10
−3
10
−2
10
−1
1
10
t
p
(s)
10
2
Fig 4.
Transient thermal impedance from junction to solder point as a function of pulse duration
PSMN165-200K_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 3 December 2009
4 of 12
NXP Semiconductors
PSMN165-200K
N-channel TrenchMOS SiliconMAX standard level FET
6. Characteristics
Table 6.
Symbol
V
(BR)DSS
V
GS(th)
Characteristics
Parameter
drain-source
breakdown voltage
gate-source threshold
voltage
Conditions
I
D
= 250 µA; V
GS
= 0 V; T
j
= 25 °C
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 150 °C;
see
Figure 8
I
D
= 1 mA; V
DS
= V
GS
; T
j
= -55 °C;
see
Figure 8
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 25 °C;
see
Figure 8
I
DSS
I
GSS
R
DSon
drain leakage current
gate leakage current
drain-source on-state
resistance
V
DS
= 160 V; V
GS
= 0 V; T
j
= 25 °C
V
DS
= 200 V; V
GS
= 0 V; T
j
= 150 °C
V
GS
= 20 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= -20 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= 10 V; I
D
= 2.5 A; T
j
= 150 °C;
see
Figure 9
and
10
V
GS
= 10 V; I
D
= 2.5 A; T
j
= 25 °C;
see
Figure 9
and
10
Dynamic characteristics
Q
G(tot)
Q
GS
Q
GD
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
g
fs
total gate charge
gate-source charge
gate-drain charge
input capacitance
output capacitance
reverse transfer
capacitance
turn-on delay time
rise time
turn-off delay time
fall time
transfer conductance
V
DS
= 15 V; I
D
= 2.9 A; T
j
= 25 °C;
see
Figure 13
I
S
= 2.3 A; V
GS
= 0 V; T
j
= 25 °C;
see
Figure 14
I
S
= 2.9 A; dI
S
/dt = -100 A/µs; V
GS
= 0 V;
V
DS
= 25 V; T
j
= 25 °C
V
DS
= 100 V; R
L
= 100
Ω;
V
GS
= 10 V;
R
G(ext)
= 6
Ω;
T
j
= 25 °C
V
DS
= 25 V; V
GS
= 0 V; f = 1 MHz;
T
j
= 25 °C; see
Figure 12
I
D
= 3 A; V
DS
= 100 V; V
GS
= 10 V;
T
j
= 25 °C; see
Figure 11
-
-
-
-
-
-
-
-
-
-
-
40
4.5
12
1330
140
70
12
11
50
25
10
-
-
16.5
-
-
-
25
25
80
40
-
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
S
Min
200
1.2
-
2
-
-
-
-
-
-
Typ
240
-
-
-
-
-
-
-
325
130
Max
-
-
6
4
1
0.5
100
100
413
165
Unit
V
V
V
V
µA
mA
nA
nA
mΩ
mΩ
Static characteristics
Source-drain diode
V
SD
t
rr
Q
r
source-drain voltage
reverse recovery time
recovered charge
-
-
-
0.7
105
0.45
1.1
-
-
V
ns
µC
PSMN165-200K_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 3 December 2009
5 of 12
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