SURFACE MOUNT CLOCK OSCILLATOR
DFN S15-B/ BL
5.0±0.2
1.2
3.2±0.2
2.54
2.54
FEATURES
1.8 to 125 MHz
Standard ceramic package
HCMOS/TTL compatible output
APPLICATIONS
Clocking/Datacomms /PCMCIA
4
2.4
3
NC/Enable
GND
Output
Vcc
1
2
3
4
1.2
Function
DFN S15
1.3 MAX
PC board footprint
1
1.2
2
TYPE
Frequency Range
ELECTRICAL SPECIFICATIONS
supply voltage
supply current (no load)
≤
32 MHz
≤
50 MHz
≤
156 MHz
DFN S15-B
1.5 to 125 MHz
DFN S15-BL
1.5 to 125 MHz
DFN S15-BD
1.5 to 125 MHz
5 V ± 10 %
≤
15 mA
≤
30 mA
≤
70 mA
HCMOS 50 pF or 10 TTL
HCMOS 15 pF or 5 TTL
40/60...60/40 %
10 to 90 %
≤
5 ns
≥
0.9*Vdd/
≤
0.1*Vdd
≤
1 ps RMS
≤
10 ms @ 4.75 V
3.3 V ± 10 %
≤
10 mA
≤
20 mA
≤
35 mA
HCMOS 15 pF or 10 LSTTL
40/60...60/40
10 to 90 %
≤
5 ns
≥
0.9*Vdd/
≤
0.1*Vdd
≤
1 ps RMS
≤
10 ms @ 3.00 V
2.5 V ± 5 %
≤
8 mA
≤
15 mA
≤
30 mA
HCMOS 15 pF or 10 LSTTL
40/60...60/40
10 to 90 %
≤
5 ns
≥
0.9*Vdd/
≤
0.1*Vdd
≤
1 ps RMS
≤
10 ms @ 2.1 V
output load
≤
25 MHz
≥
25 MHz
duty cycle @ 50 % level or 1.4 V
rise/fall times
high/low levels
Phase jitter (fj > 1 kHz)
start up
@ 100 MHz
FREQUENCY STABILITY
types
all types
remarks
temperature range
0 to 70°
C
-10 to 70°
C
-40 to 85°
C
stability [ ppm ] and temperature code
stability
code
stability
code
stability
code
XB25
XB50
XB100
≤
± 25
≤
± 50
≤
± 100
XI25
XI50
XI100
≤
± 25
≤
± 50
≤
± 100
XE50
XE75
XE100
≤
± 50
≤
± 75
≤
± 100
st
stability includes calibration at 25° temperature, ageing, Vcc and load changes 1 yr.
C,
OPTIONS
tight symmetry
tri-state output on pin 1
CODE
R
Z
45/55...55/45 %
high or open = enable, low = high Z
ORDERING CODE
Example
type + option code + frequency + stability/temperature code
DFN S15-BLRZ 50.000 MHz XB25
IMPORTANT NOTE
THIS PRODUCT IS DESIGNED FOR VOLUME APPLICATIONS ONLY
TYPE
DFN S15-B & BL
REVISION
02
CHECKED
NE
DATE
28.05.2008
PAGE
DSP and ARM Processors
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