Product Brief
CX6200
Structured ASIC with USB 2.0 PHY
Product Description
The CX6200 product family—a member of the latest generation of Structured ASICs from ChipX—
combines built-in, silicon-proven, industry standard PHYs for USB 2.0 High Speed On-the-Go (OTG)
with the well-proven X-Cell™ Structured ASIC architecture to provide industry leading performance
using the UMC eight-metal high-speed 0.13-µm deep submicron process. Up to four metal layers are
used for customization, allowing ChipX to hold wafers at bank with most of the processing
completed. Prototypes are manufactured, assembled, tested, and shipped in just 4 to 5 weeks.
The built-in, silicon-proven USB 2.0 HS OTG PHY, in combination with ChipX validated,
synthesizable processors and USB Host, Device, and OTG controllers, form a complete,
interoperability-proven, USB subsystem capable of achieving USB-IF compliance. You can also use
your own USB controller and processor of choice where desired. The USB subsystem on the
CX6200 family of products removes complexity and risk of IP selection and IP interoperability testing,
enabling faster time to market.
Table 1. CX6200 Product Matrix
Part Number Usable Gates Memory (Kbits)
Maximum
PLL
USB 2.0
[KGates]
(9-Kb Banks) Configurable 10 MHz–1 GHz OTG PHY
I/O*
CX6210
CX6211
CX6212
CX6214
CX6215
CX6216
CX6220
CX6222
CX6237
CX6273
CX6275
CX6277
140
168
196
280
336
392
470
564
658
1300
1560
1820
324 (36)
306 (34)
288 (32)
306 (34)
270 (30)
234 (26)
288 (32)
252 (28)
216 (24)
1044 [116]
918 [102]
846 [94]
120
130
140
144
150
160
170
184
200
238
254
280
4
4
4
4
4
4
4
4
4
7
7
7
P
P
P
P
P
P
P
P
P
P
P
P
Packages
56 QFN, 88 QFN, 144 TFBGA, 208
PQFP, 256 LBGA, 272 PBGA
56 QFN, 88 QFN, 144 TFBGA, 208
PQFP, 256 LBGA, 272 PBGA
56 QFN, 88 QFN, 144 TFBGA, 208
PQFP, 256 LBGA, 272 PBGA
56 QFN, 88 QFN, 144 TFBGA, 208
PQFP, 256 LBGA, 272 PBGA
56 QFN, 88 QFN, 144 TFBGA, 208
PQFP, 256 LBGA, 272 PBGA
56 QFN, 88 QFN, 144 TFBGA, 208
PQFP, 256 LBGA, 272 PBGA
56 QFN, 88 QFN, 144 TFBGA, 208
PQFP, 256 LBGA, 272 PBGA
56 QFN, 88 QFN, 144 TFBGA, 208
PQFP, 256 LBGA, 272 PBGA
56 QFN, 88 QFN , 144 TFBGA, 208
PQFP, 256 LBGA, 272 PBGA
272 PBGA, 388 PBGA, 456 PBGA,
676 PBGA
272 PBGA, 388 PBGA, 456 PBGA,
676 PBGA
272 PBGA, 388 PBGA, 456 PBGA,
676 PBGA
* User configurable I/O. Does not include PHY.
The CX6200 product family builds on four generations of ChipX Structured ASIC products, and
provides the greatest level of flexibility in terms of I/O and memory configurations.
November 30, 2006
0211-6k-070-B
1
CX6200
Structured ASIC with USB 2.0 PHY
Product Brief
Applications
The CX6200 is optimized with IP content and size ranges to support specific system applications.
Consumer Markets
Set-top boxes
Video cameras
Digital TVs
LCD displays
Industrial Markets
POS systems
Test and measurement
Machine controls
Medical equipment
Imaging Markets
Printers
Print management
systems
Scanners
Communications Markets
Broadband modems
Wireless routers
Design Flow
ChipX spends considerable development effort to ensure that taping out a design to a CX6200
Structured ASIC is simple, painless, and low risk. ChipX provides libraries for Magma, Synopsys,
and Synplicity ASIC synthesis tools.
RTL, ASIC Netlist, or FPGA Netlist Handoff
Many customers prefer to hand off their RTL designs early and let ChipX perform the entire timing
closure loop, including synthesis and final simulations. Our integrated development tools allow a
faster overall design cycle with an RTL handoff. ChipX can also rapidly and reliably convert obsolete
design netlists into prototypes.
Key Features and Benefits
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USB 2.0 HS On-the-Go PHY offers OTG, Device, and Host functionality
250-MHz maximum global operating frequency, 1-GHz local
True ASIC gate count of 140K to 1.8M usable gates, using the
th
ChipX 4 generation, fine grain Structured ASIC fabric
High speed embedded SRAM of 216 Kb to 1044 Kb
Highly configurable RAM blocks of 9 Kb for excellent memory
use efficiency
Single port, dual port, or FIFO configurations of RAM blocks
Core operating voltage 1.2 V
I/O voltages of 1.5 V, 1.8 V, 2.5 V and 3.3 V; output drive
strengths of up to 16 mA
Flexible I/O pads that can be power, ground, input, output or
bidirectional
I/O support: LVTTL, LVCMOS, HSTL, SSTL (18/2/3), LVDS
(up to 840 Mb/s), RSDS, PCI, PCI-X, XOSC
Commercial and Industrial grade temperature libraries
Up to seven configurable PLLs with Spread Spectrum
tracking, output range of 10 MHz – 1 GHz
Multiple DLLs with output frequency of up to 500 MHz
Packages from 56 QFN to 676 PBGA
Fast time to prototypes and production, standard cell ASIC migration available
For more information, please visit our website:
www.chipx.com
Disclaimer
This document is provided for general information only. ChipX makes every effort to improve products for its customers
on an ongoing basis. For current and complete product specifications, please refer to the CX6000 Data Book, available from ChipX.
Specifications are subject to change without notice. Trademarks are property of their owners. Errors and omissions excluded
(E&OE).
© 2006 ChipX, Incorporated
2
0211-6k-070-B
November 30, 2006