Solid State Devices, Inc.
14701 Firestone Blvd * La Mirada, Ca 90638
Phone: (562) 404-4474 * Fax: (562) 404-1773
ssdi@ssdi-power.com * www.ssdi-power.com
SPD805SMS
thru
SPD830SMS
8 AMP
50-300 VOLTS
40 nsec
Hyper Fast Rectifier
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Designer’s Data Sheet
Part Number/Ordering Information
1/
SPD
__ __ __
│ │
└
Screening
│ │
__
= Not Screened
│ │
TX = TX Level
│ │
TXV = TXV
│ │
S = S Level
│ │
│
└
Package Type
│
SMS = Surface Mount Square Tab
│
│
└
Voltage/Family
805 = 50V
810 = 100 V
820 = 200 V
830 = 300 V
2/
FEATURES:
Hyper Fast Recovery: 40 nsec maximum
PIV to 300 Volts
Hermetically Sealed
Void Free Construction
For High Efficiency Applications
Low Forward Voltage Drop
Square Tab Surface Mount Package
Replaces 1N5811 types
2/
TX, TXV, and Space Level Screening Available
MAXIMUM RATINGS
Peak Repetitive Reverse Voltage and
DC Blocking Voltage
Average Rectified Forward Current
(Resistive Load, 60 Hz, Sine Wave, T
A
= 25°C)
SPD805SMS
SPD810SMS
SPD820SMS
SPD830SMS
Symbol
Value
50
100
200
300
Units
Volts
V
RRM
V
RWM
V
R
I
O
I
FSM
T
OP
& T
stg
R
θJE
8
125
-65 to +175
12
Amps
Amps
o
o
Peak Surge Current
(8.3 ms Pulse, Half Sine Wave Superimposed on I
O
, allow junction to reach
equilibrium between pulses, T
A
=25
o
C)
Operating and Storage Temperature
Maximum Thermal Resistance
Junction to End Tab
C
C/W
NOTES:
1/
For Ordering Information, Price, and Availability- Contact Factory.
2/
Screening Based on MIL-PRF-19500. Screening Flows Available on Request.
Square Tab Surface Mount (SMS)
NOTE:
All specifications are subject to change without notification.
SCD's for these devices should be reviewed by SSDI prior to release.
DATA SHEET #: RH0093C
DOC
Solid State Devices, Inc.
14701 Firestone Blvd * La Mirada, Ca 90638
Phone: (562) 404-4474 * Fax: (562) 404-1773
ssdi@ssdi-power.com * www.ssdi-power.com
SPD805SMS
thru
SPD830SMS
ELECTRICAL CHARACTERISTICS
Instantaneous Forward Voltage Drop
(I
F
= 8 Adc, T
A
= 25
o
C, 300Μs pulse)
Instantaneous Forward Voltage Drop
(I
F
= 8 Adc, T
A
= -55
o
C, 300Μs pulse)
Reverse Leakage Current
(At Rated V
R
, 300Μs pulse minimum)
Reverse Recovery Time
(I
F
= 500 mA, I
R
= 1 A, I
RR
= 250 mA, T
A
= 25
o
C)
Junction Capacitance
(V
R
= 10 V
DC
, T
A
= 25
o
C, f = 1 MHz)
T
A
= 25
o
C
T
A
= 100
o
C
Symbol
V
F1
V
F2
I
R1
I
R2
t
rr
C
J
Max
1.00
1.10
20
1
40
100
Unit
Vdc
Vdc
μA
mA
ns
pF
Case Outline:
(SMS)
DIM
A
B
C
D
Note: Dimensions prior to soldering.
MIN
0.172”
0.220”
0.020”
0.002”
MAX
0.180”
0.290”
0.035”
––
NOTE:
All specifications are subject to change without notification.
SCD's for these devices should be reviewed by SSDI prior to release.
DATA SHEET #: RH0093C
DOC
FPGA/CPLD
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