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XCTA20019101C

Description
RES NET,THIN FILM,19.1K OHMS,100WV,.2% +/-TOL,-50,50PPM TC,0303 CASE
CategoryPassive components    The resistor   
File Size107KB,3 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
Environmental Compliance  
Download Datasheet Parametric View All

XCTA20019101C Overview

RES NET,THIN FILM,19.1K OHMS,100WV,.2% +/-TOL,-50,50PPM TC,0303 CASE

XCTA20019101C Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Objectid1178287905
package instructionSMT, 0303
Reach Compliance Codeunknown
ECCN codeEAR99
structureChip
Manufacturer's serial numberCTA
Network TypeCenter Tap
Number of terminals6
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package height0.254 mm
Package length0.762 mm
Package formSMT
Package width0.762 mm
method of packingTray
Rated power dissipation(P)0.125 W
resistance19100 Ω
Resistor typeARRAY/NETWORK RESISTOR
seriesCTA
size code0303
Temperature Coefficient50 ppm/°C
Tolerance0.2%
Operating Voltage100 V
CTA
Vishay Electro-Films
Thin Film, Center-Tapped Resistor
CHIP
RESISTORS
FEATURES
Wire bondable
Product may not
be to scale
Center tap feature
Tight ratio tolerances to: ± 0.1 %
Chip size: 0.030 inches square
Resistance range total: 25
Ω
to 35 kΩ
Alumina substrate, low shunt capacitance: < 0.2 pF
Resistor material nichrome
Excellent stability: ± 0.025 % maximum
ΔR/R
The CTA series resistor chips combine the best tolerances,
stability and low shunt capacitance. The CTA offers the
designer flexibility in use as either a single value resistor or
as two resistors with a center tap feature. The CTAs six
bonding pads allows the user increased layout flexibility. The
CTAs are manufactured using Vishay Electro-Films (EFI)
sophisticated thin film equipment and manufacturing
technology. The CTAs are 100 % electrically tested and
visually inspected to MIL-STD-883.
APPLICATIONS
The CTA center-tapped resistor chips are used mainly in
feedback circuits of amplifiers where ratio matching, low
shunt capacitance and tracking between two resistors is
critical.
Recommended for hermetic environments where chip is not
exposed to moisture.
For lower values, the resistance of the six bonding-pad
configurations can vary, depending on the method of
measurement used. Vishay EFI measures low-value
resistors by the four-wire Kelvin technique. The measuring
method is illustrated in the diagram to the right.
I
I
I
R
A
R
B
V
V
V
TEMPERATURE COEFFICIENT OF RESISTANCE, VALUES AND TOLERANCES
Tightest Standard Tolerance Available
PROCESS CODE
0.1 %
± 10 ppm/°C
± 25 ppm/°C
± 50 ppm/°C
± 100 ppm/°C
CLASS H*
203
202
200
201
*MIL-PRF-38534 inspection criteria
CLASS K*
233
232
230
231
25
Ω
100
Ω
200
Ω
1 kΩ
20 kΩ
35 kΩ
STANDARD ELECTRICAL SPECIFICATIONS
PARAMETER
TCR Tracking Between Halves (R
A
/R
B)
Center Tap Ratio,
R
A
/R
B
: Tolerance
Noise, MIL-STD-202, Method 308
Moisture Resistance, MIL-STD-202, Method 106, (Passivated only)
Stability, 1000 h, + 125 °C, 62 mW
Operating Temperature Range
Thermal Shock, MIL-STD-202, Method 107, Test Condition F
High Temperature Exposure, + 150 °C, 100 h
Insulation Resistance
Operating Voltage
DC Power Rating at + 70 °C (Derated to Zero at + 150 °C)
5 x Rated Power Short-Time Overload, + 25 °C, 5 s
*10ppm/°C for
R
< 100
www.vishay.com
68
For technical questions, contact: efi@vishay.com
Document Number: 61015
Revision: 12-Mar-08
± 2 ppm/°C*
1 ± 1 % standard
- 35 dB typ.
± 0.5 % max.
ΔR/R
± 0.025 % max.
ΔR/R
- 55 °C to + 125 °C
± 0.1 % max.
ΔR/R
± 0.1 % max.
ΔR/R
10
12
min.
100 V max.
125 mW
± 0.25 % max.
ΔR/R
%
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