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LS5301_14

Description
VERY HIGH INPUT IMPEDANCE N-CHANNEL JFET AMPLIFIER
File Size173KB,1 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
Download Datasheet View All

LS5301_14 Overview

VERY HIGH INPUT IMPEDANCE N-CHANNEL JFET AMPLIFIER

LS5301, PF5301
VERY HIGH INPUT IMPEDANCE
N-CHANNEL JFET AMPLIFIER
FEATURES
REPLACEMENT FOR LF5301, PF5301
HIGH INPUT INPEDANCE
HIGH GAIN
ABSOLUTE MAXIMUM
RATINGS
1
@ 25 °C (unless otherwise stated), TA=25°C
Maximum Temperatures
Storage Temperature (TO-72)
Storage Temperature (TO-92)
Maximum Power
Dissipation
2
300mW
50mA
-30V
-30V
Continuous Power Dissipation, TA=25°C
Maximum Currents
Gate Current
Maximum Voltages
Gate to Drain
Gate to Source
-55 to 150°C
-55 to 150°C
G
3
S
2
D
1
I
G
= 0.100 pA
g
fs
= 70 µS
LS5301
TO-72
TOP VIEW
PF5301
TO-92
TOP VIEW
COMMON ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated)
SYMBOL
BV
GSS
V
GS(off)
I
GSS
I
G
I
DSS
g
fs
C
iss
C
rss
e
n
CHARACTERISTIC
Gate to Source Breakdown Voltage
Gate to Source Cutoff Voltage
Gate Leakage Current
Gate Operating Current
Drain to Source Saturation Current
Forward Transconductance
Input Capacitance
Reverse Transfer Capacitance
Equivalent Noise Voltage
45
30
70
LS5301
PF5301
-0.04
500
500
3
1.5
150
µA
µS
pF
nV/√Hz
MIN
-30
-0.6
-3.0
-1
-5
pA
TYP
MAX
UNIT
V
CONDITIONS
V
DS
= 0V, I
D
= -1µA
V
DS
= 10V, I
D
= 1nA
V
DS
= 0V, V
GS
= -15V
V
DG
= 6V, I
D
= 5µA
V
DS
= 10V, V
GS
= 0V
V
DS
= 10V, V
GS
= 0V,
f
= 1kHz
V
DS
= 10V, V
GS
= 0V,
f
= 1MHz
V
DG
= 10V, I
D
= 50µA,
f
= 100Hz
NOTES
1.
2.
3.
Absolute maximum ratings are limiting values above which serviceability may be impaired.
Derate PF series 2.8mW/° C when TA>25° C. Derate LS series 2.0mW°C when TA>25° C
All MIN/TYP/MAX limits are absolute numbers. Negative signs indicated electrical polarity only.
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use;
nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Linear Integrated Systems.
Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing high-quality
discrete components. Expertise brought to LIS is based on processes and products developed at Amelco, Union Carbide, Intersil
and Micro Power Systems by company President John H. Hall. Hall, a protégé of Silicon Valley legend Dr. Jean Hoerni, was the
director of IC Development at Union Carbide, Co-Founder and Vice President of R&D at Intersil, and Founder/President of Micro
Power Systems.
Linear Integrated Systems
4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 201141 04/24/14 Rev#A12
ECN#LS5301 PF5301
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