COMPANY CONFIDENTIAL
PI7VD9008ABH
Adaptive EQ 8-channel 960H Video Decoder
General Features
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Real time AEQ 8-channel Video/Audio decoder for
Description
PI7VD9008ABH is AEQ 8-Channel Video Decoders and Audio
Codec. Built-in Adaptive equalizer (AEQ) recover the noisy
signals caused by long or small wire gauge Coax cables and
display the best picture image view quality. The video decoder
converts NTSC, PAL analog composite video broadcasting signal
(CVBS) into digital components YCbCr for video controller or
processor to perform pre-view, compression and storage etc. The
converted digital video streams complying with ITU-R BT.656
are transported in time multiplexed format, which contains one,
two or four video channels.
Single 27MHz reference crystal clock support NTSC, PAL and 960H
standard resolution. Each video channel contains 10-bit ADC,
proprietary clamp, automatic gain controller and 5H comb filter
for separating luminance & chrominance to reduce artificial noise.
WD1(960H) and D1 cameras
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Built-in Adaptive Equalizer(AEQ) for the best picture
image in the several hundred meter coax cable condition
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Proprietary Pericom AEQ technology recover weak, noisy,
or unstable analog input signals
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Resilient SYNC TIP detection to lock video signal in a
noisy environment
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Programmable sharpness, CTI, hue, saturation, contrast
and brightness
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Support time multiplexed format of ITU-R BT.656 output
with 54/108MHz or72/144MHz
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Provides a programmable mapping from four or eight
(non-real-time) analog video inputs to four BT.656 digital
outputs
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NTSC(M), NTSC 4.43, PAL (B, D, G, H, I, M, Nc, 60)
standard support
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High performance 5H comb filter for all NTSC/PAL
standards
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Built-in 10-bit audio Codec to allow 10 analog audio
inputs and 1audio output
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Mixed audio analog output for multiple audio channels
with multiple audio sample rates for 8, 16, 32, 44.1,
48KHz audio frequency
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Two serial audio formats (I2S and DSP) are supported for
recording/mixing output and playback input
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Selectable Master and Slave serial audio interface
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Integrated video PLL for 108MHz, 144MHz clock output
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Two-wire serial interface(I2C) for register access
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Industrial grade temperature support (-40˚C ~ 85˚C)
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Packages: 128-pin LQFP
Application
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Video Security DVRs
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Automotive Camera Driver Assistant Systems
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Video Capture Cards
PI7VD9008ABH System Application Diagram
Display
8-ch AEQ
Video Decoder
CVBS Video/Audio
ITU-R BT656
Video
Processor
Ethernet
Storage
Typical Video Security System Application
14-0207
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12/12/14
Adaptive EQ 8-channel 960H Video Decoder
PI7VD9008ABH
PI7VD9008ABH Block Diagram
VINA0
VINA1
VINA2
VINA3
VADC
VINA4
VINA5
VINA6
VINA7
AEQ
AEQ
AEQ
AEQ
AEQ
AEQ
AEQ
AEQ
Video
Decoder
Video
Decoder
Video
Decoder
Video
Decoder
Video
Decoder
Video
Decoder
Video
Decoder
Host
Int.
PIXOUT_0
PIXOUT_1
PIXOUT_2
PIXOUT_3
GPIO_0
GPIO_1
GPIO_2
GPIO_3
XTO
TDM
AV
PLL
GPIO
Int.
Video
Ports
XTI
RESET_L
SCL
SDA
IRQ
Video
Decoder
LINE_IN0
LINE_IN1
LINE_IN2
LINE_IN3
LINE_IN4
LINE_IN5
LINE_IN6
LINE_IN7
LINE_IN8
LINE_IN9
AOUT
AUDIO
I2S/DS
P Int.
AADC
LPF
LPF
LPF
LPF
LPF
LPF
LPF
LPF
LPF
LPF
SCLK_R
Audio
Signal
Process
LRCK_R
SDOUT_R
SDOUT_M
SCLK_P
LRCK_P
SDIN_P
Audio
Encoder
SDLINK_I
SDLINK_O
ADAC
Video input sources:
BT.656 TDM ports:
Audio input sources:
I2S/DSP Audio Interface
CV_INA0, CV_INA1, CV_INA2, CV_INA3, CV_INA4, CV_INA5, CV_INA6, CV_INA7
PIXOUT_0, PIXOUT_1, PIXOUT_2 and PIXOUT_3
LINE_IN0, LINE_IN1, LINE_IN2, LINE_IN3, LINE_IN4,LINE_IN5,LINE_IN6,LINE_
IN7,LINE_IN8,LINE_IN9
(SCLK_R, LRCK_R, SDOUT_R and SDOUT_M), (SCLK_P, LRCK_P and SDIN_P), (SD_LIN-
KI, SD_LINKO)
14-0207
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12/12/14
PI7VD9008ABH
Adaptive EQ 8-channel 960H Video Decoder
Pin Configuration(128-LQFP)
VDDPLL
VDDPLL
ADC_VDD
VSS
ADC_VDD
VSS
ADC_VDD
ADC_VDD
CV_INA7
CV_INA3
VSS
CV_INA6
CV_INA2
ADC_VDD
CV_INA5
CV_INA1
VSS
CV_INA4
CV_INA0
ADC_VDD
ADC_VDD
LINE_IN4
LINE_IN3
LINE_IN2
LINE_IN1
LINE_IN0
VCM0
VSS
VSS
LINE_OUT
ADAC_VDD
ADAC_VDD
VSS
VSS
VSS
VDDC
TM1
SA0
SA1
VSS
VDDC
RESET_ L
SCL
SDA
VSS
SD_LINKI
VD33
PIXOUT_3[7]
PIXOUT_3[6]
PIXOUT_3[5]
PIXOUT_3[4]
VSS
VDDC
PIXOUT_3[3]
PIXOUT_3[2]
PIXOUT_3[1]
PIXOUT_3[0]
VSS
VDDC
VSS
VD33
PIXOUT_2[7]
PIXOUT_2[6]
PIXOUT_2[5]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
88
97
PI7VD9008ABH
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
LINE_IN9
LINE_IN8
LINE_IN7
LINE_IN6
LINE_IN5
VCM1
VSS
VSS
INT
VDDC
GPIO_3
GPIO_2
GPIO_1
GPIO_0
VD33
SD_LINKO
SDIN_P
LRCK_P
SCLK_P
VSS
SDOUT_M
SDOUT_R
LRCK_R
SCLK_R
VD33
PIXOUT_0[0]
PIXOUT_0[1]
PIXOUT_0[2]
PIXOUT_0[3]
VSS
PIXOUT_0[4]
PIXOUT_0[5]
PIXOUT_2[4]
VSS
VDDC
PIXOUT_2[3]
PIXOUT_2[2]
PIXOUT_2[1]
PIXOUT_2[0]
VSS
VD33
PIXCLK_PO
PIXCLK_NO
VSS
VDDC
XIN
XOUT
VSS
VD33
PIXOUT_1[7]
PIXOUT_1[6]
PIXOUT_1[5]
PIXOUT_1[4]
VSS
VDDC
PIXOUT_1[3]
PIXOUT_1[2]
PIXOUT_1[1]
PIXOUT_1[0]
VD33
VSS
VDDC
PIXOUT_0[7]
PIXOUT_0[6]
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
14-0207
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12/12/14
Adaptive EQ 8-channel 960H Video Decoder
PI7VD9008ABH
Pin Configuration (128-LQFP)
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Name
VSS
VSS
VSS
VDDC
TM1
SA0
SA1
VSS
VDDC
RESET_L
SCL
SDA
VSS
SD_LINKI
VD33
PIXOUT_3[7]
PIXOUT_3[6]
PIXOUT_3[5]
PIXOUT_3[4]
VSS
VDDC
PIXOUT_3[3]
PIXOUT_3[2]
PIXOUT_3[1]
PIXOUT_3[0]
VSS
VDDC
VSS
VD33
PIXOUT_2[7]
PIXOUT_2[6]
PIXOUT_2[5]
Pin
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Name
PIXOUT_2[4]
VSS
VDDC
PIXOUT_2[3]
PIXOUT_2[2]
PIXOUT_2[1]
PIXOUT_2[0]
VSS
VD33
PIXCLK_PO
PIXCLK_NO
VSS
VDDC
XIN
XOUT
VSS
VD33
PIXOUT_1[7]
PIXOUT_1[6]
PIXOUT_1[5]
PIXOUT_1[4]
VSS
VDDC
PIXOUT_1[3]
PIXOUT_1[2]
PIXOUT_1[1]
PIXOUT_1[0]
VD33
VSS
VDDC
PIXOUT_0[7]
PIXOUT_0[6]
Pin
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
Name
PIXOUT_0[5]
PIXOUT_0[4]
VSS
PIXOUT_0[3]
PIXOUT_0[2]
PIXOUT_0[1]
PIXOUT_0[0]
VD33
SCLK_R
LRCK_R
SDOUT_R
SDOUT_M
VSS
SCLK_P
LRCK_P
SDIN_P
SD_LINKO
VD33
GPIO_0
GPIO_1
GPIO_2
GPIO_3
VDDC
INT
VSS
VSS
VCM1
LINE_IN5
LINE_IN6
LINE_IN7
LINE_IN8
LINE_IN9
Pin
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
Name
ADAC_VDD
ADAC_VDD
LINE_OUT
VSS
VSS
VCM0
LINE_IN0
LINE_IN1
LINE_IN2
LINE_IN3
LINE_IN4
ADC_VDD
ADC_VDD
CV_INA0
CV_INA4
VSS
CV_INA1
CV_INA5
ADC_VDD
CV_INA2
CV_INA6
VSS
CV_INA3
CV_INA7
ADC_VDD
ADC_VDD
VSS
ADC_VDD
VSS
ADC_VDD
VDDPLL
VDDPLL
14-0207
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12/12/14
PI7VD9008ABH
Adaptive EQ 8-channel 960H Video Decoder
Pin-out Information
Analog Video/Audio Interface
Pin Name
CV_INA0,
CV_INA4,
CV_INA1,
CV_INA5,
CV_INA2,
CV_INA6,
CV_INA3,
CV_INA7
VCM0,
VCM1
LINE_IN0,
LINE_IN1,
LINE_IN2,
LINE_IN3,
LINE_IN4
LINE_IN5,
LINE_IN6,
LINE_IN7,
LINE_IN8,
LINE_IN9
LINE_OUT
Pin Number
110,
111,
113,
114,
116,
117,
119,
120
102,
91
103,
104,
105,
106,
107
92
93
94
95
96
99
Type
Description
CVBS input of Video channel 0
CVBS input of Video channel 4
CVBS input of Video channel 1
CVBS input of Video channel 5
CVBS input of Video channel 2
CVBS input of Video channel 6
CVBS input of Video channel 3
CVBS input of Video channel 7
Analog
Analog
Connect to an external capacitor
Line input of Audio channel 0
Line input of Audio channel 1
Line input of Audio channel 2
Line input of Audio channel 3
Line input of Audio channel 4
Line input of Audio channel 5
Line input of Audio channel 6
Line input of Audio channel 7
Line input of Audio channel 8
Line input of Audio channel 9
Analog
Analog
Mixed Analog Audio Output
Digital Video/Audio Interface
Pin Name
PIXOUT_0[7:0]
PIXOUT_1[7:0]
PIXOUT_2[7:0]
PIXOUT_3[7:0]
GPIO_0
GPIO_1
GPIO_2
GPIO_3
14-0207
Pin Number
63, 64, 65, 66,68,69, 70,71
50, 51, 52, 53, 56,57,58,59
30, 31, 32, 33, 36, 37, 38, 39
16, 17, 18, 19, 22, 23, 24, 25
83
84
85
86
Type
Output
Output
Output
Output
Output
Output
Output
Output
5
Description
Bt.656 Time Multiplex Division output of port 0
Bt.656 Time Multiplex Division output of port 1
Bt.656 Time Multiplex Division output of port 2
Bt.656 Time Multiplex Division output of port 3
According to register setting, it outputs GPO, HSYC, VSYNC,
FDFLAG, ACTIVE and VDLOSS of channel 0, 4
According to register setting, it outputs GPO, HSYC, VSYNC,
FDFLAG, ACTIVE and VDLOSS of channel 1, 5
According to register setting, it outputs GPO, HSYC, VSYNC,
FDFLAG, ACTIVE and VDLOSS of channel 2, 6
According to register setting, it outputs GPO, HSYC, VSYNC,
FDFLAG, ACTIVE and VDLOSS of channel 3, 7
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12/12/14