Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT11APX-1200
GENERAL DESCRIPTION
Enhanced performance new generation,high voltage, high-speed switching npn transistor in a plastic full-pack
envelope intended for use in horizontal deflection circuits of colour television receivers. Features exceptional
tolerance to base drive and collector current load variations resulting in a very low worst case dissipation.
QUICK REFERENCE DATA
SYMBOL
V
CESM
V
CBO
V
CEO
I
C
I
CM
P
tot
V
CEsat
h
FEsat
t
f
PARAMETER
Collector-emitter voltage peak value
Collector-Base voltage (open emitter)
Collector-emitter voltage (open base)
Collector current (DC)
Collector current peak value
Total power dissipation
Collector-emitter saturation voltage
DC current gain
Fall time
CONDITIONS
V
BE
= 0 V
TYP.
-
-
-
-
-
-
0.15
15.5
170
MAX.
1200
1200
550
6
10
32
1.0
-
300
UNIT
V
V
V
A
A
W
V
ns
T
hs
≤
25 ˚C
I
C
= 2 A; I
B
= 0.4 A
I
C
= 3 A; V
CE
= 5 V
I
C
= 2.5 A; I
B1
= 0.5 A
PINNING - SOT186A
PIN
1
2
3
base
collector
emitter
DESCRIPTION
PIN CONFIGURATION
case
SYMBOL
c
b
1 2 3
case isolated
e
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL
V
CESM
V
CEO
V
CBO
I
C
I
CM
I
B
I
BM
P
tot
T
stg
T
j
PARAMETER
Collector to emitter voltage
Collector to emitter voltage (open base)
Collector to base voltage (open emitter)
Collector current (DC)
Collector current peak value
Base current (DC)
Base current peak value
Total power dissipation
Storage temperature
Junction temperature
CONDITIONS
V
BE
= 0 V
MIN.
-
-
-
-
-
-
-
-
-65
-
MAX.
1200
550
1200
6
10
3
5
32
150
150
UNIT
V
V
V
A
A
A
A
W
˚C
˚C
T
hs
≤
25 ˚C
THERMAL RESISTANCES
SYMBOL
R
th j-hs
R
th j-a
PARAMETER
Junction to heatsink
Junction to ambient
CONDITIONS
with heatsink compound
in free air
TYP.
-
55
MAX.
3.95
-
UNIT
K/W
K/W
April 1999
1
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT11APX-1200
ISOLATION LIMITING VALUE & CHARACTERISTIC
T
hs
= 25 ˚C unless otherwise specified
SYMBOL
V
isol
PARAMETER
R.M.S. isolation voltage from all
three terminals to external
heatsink
CONDITIONS
f = 50-60 Hz; sinusoidal
waveform;
R.H.
≤
65% ; clean and dustfree
MIN.
-
TYP.
-
MAX.
2500
UNIT
V
C
isol
Capacitance from T2 to external f = 1 MHz
heatsink
-
10
-
pF
STATIC CHARACTERISTICS
T
hs
= 25 ˚C unless otherwise specified
SYMBOL
I
CES
I
CES
I
EBO
V
CEOsust
V
CEsat
V
BEsat
h
FE
h
FE
h
FEsat
h
FEsat
PARAMETER
Collector cut-off current
1
Emitter cut-off current
Collector-emitter sustaining voltage
Collector-emitter saturation voltage
Base-emitter saturation voltage
DC current gain
DC current gain
CONDITIONS
V
BE
= 0 V; V
CE
= V
CESMmax
V
BE
= 0 V; V
CE
= V
CESMmax
;
T
j
= 125 ˚C
V
EB
= 7 V; I
C
= 0 A
I
B
= 0 A; I
C
= 10 mA;
L = 25 mH
I
C
= 2.0 A; I
B
= 0.4 A
I
C
= 2.0 A; I
B
= 0.4 A
I
C
= 1 mA; V
CE
= 5 V
I
C
= 500 mA; V
CE
= 5 V
I
C
= 2 A; V
CE
= 5 V
I
C
= 3.0 A; V
CE
= 5 V
MIN.
-
-
-
550
-
-
13
20
13
-
TYP.
-
-
-
-
0.15
0.91
25
30
18.5
15.5
MAX.
1.0
2.0
0.1
-
1.0
1.5
-
47
25
-
UNIT
mA
mA
mA
V
V
V
DYNAMIC CHARACTERISTICS
T
hs
= 25 ˚C unless otherwise specified8
SYMBOL
PARAMETER
Switching times (resistive load)
t
on
t
s
t
f
Turn-on time
Turn-off storage time
Turn-off fall time
Switching times (inductive load)
t
s
t
f
Turn-off storage time
Turn-off fall time
Switching times (inductive load)
t
s
t
f
Turn-off storage time
Turn-off fall time
CONDITIONS
I
Con
= 2.5 A; I
Bon
= -I
Boff
= 0.5 A;
R
L
= 75 ohms; V
BB2
= 4 V;
TYP.
MAX.
UNIT
µs
µs
µs
µs
ns
µs
ns
-
-
-
0.5
3
0.3
I
Csat
= 2.5 A; I
B1
= 0.5 A; L
B
= 1
µH;
-V
BB
= 5 V
I
Csat
= 2.5 A; I
B1
= 0.5 A; L
B
= 1
µH;
-V
BB
= 5 V; T
j
= 100 ˚C
-
170
1.5
300
-
-
1.8
300
1
Measured with half sine-wave voltage (curve tracer).
April 1999
2
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT11APX-1200
+ 50v
100-200R
IC
90 %
ICsat
90 %
10 %
Horizontal
Oscilloscope
Vertical
300R
30-60 Hz
6V
1R
IB
ts
ton
toff
IB1
10 %
tr
30ns
-IB2
tf
Fig.1. Test circuit for V
CEOsust
.
Fig.4. Switching times waveforms with resistive load.
IC / mA
VCC
250
200
LC
IBon
100
LB
T.U.T.
-VBB
0
VCE / V
min
VCEOsust
Fig.2. Oscilloscope display for V
CEOsust
.
Fig.5. Test circuit inductive load.
V
CC
= 300 V; -V
BE
= 5 V; L
C
= 200 uH; L
B
= 1 uH
VCC
ICsat
90 %
IC
RL
VIM
0
tp
T
- IB2
10 %
RB
T.U.T.
IB
IB1
ts
tf
t
t
Fig.3. Test circuit resistive load. V
IM
= -6 to +8 V
V
CC
= 250 V; t
p
= 20
µs; δ
= t
p
/ T = 0.01.
R
B
and R
L
calculated from I
Con
and I
Bon
requirements.
Fig.6. Switching times waveforms with inductive load.
April 1999
3
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT11APX-1200
120
110
100
90
80
70
60
50
40
30
20
10
0
PD%
Normalised Power Derating
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
VBEsat/V
0
20
40
60
80
100
Tmb / C
120
140
0.1
1
IC/A
10
Fig.7. Normalised power dissipation.
PD% = 100⋅PD/PD
25˚C
= f (T
hs
)
h
FE
100
Fig.10. Base-Emitter saturation voltage.
Solid lines = typ values, V
BEsat
= f(IC); at IC/IB =4.
VCEsat/V
0.5
5V
0.4
0.3
10
0.2
Tj = 25 C
1V
0.1
1
0.01
0.0
0.1
IC / A
1
10
0.1
1
IC/A
10
Fig.8. Typical DC current gain. h
FE
= f(I
C
)
parameter V
CE
Fig.11. Collector-Emitter saturation voltage.
Solid lines = typ values, V
CEsat
= f(IC); at IC/IB =4.8
Zth / (K/W)
VCEsat/V
2.0
10
0.5
BU1706AX
1.6
IC=1A
1.2
2A
3A
4A
1
0.2
0.1
0.05
0.02
P
D
tp
t
p
0.1
0.8
D=
T
t
0.01
0.4
D=0
0.001
0.10
IB/A
1.00
10.00
T
10u 100u 1m 10m 100m
t/s
1
0.0
0.01
1u
10
100
Fig.9. Collector-Emitter saturation voltage.
Solid lines = typ values, V
CEsat
= f(IB); T
j
=25˚C.
Fig.12. Transient thermal impedance.
Z
th j-hs
= f(t); parameter D = t
p
/T
April 1999
4
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT11APX-1200
IC (A)
11
VCC
10
9
8
7
LC
VCL(RBSOAR)
6
5
4
IBon
PROBE POINT
LB
T.U.T.
3
2
-VBB
1
0
0
200
400
600
800
1,000
1,200
1,400
VCEclamp (V)
Fig.13. Reverse bias safe operating area. T
j
≤
T
j max
Fig.14. Test circuit for reverse bias safe operating
area.
V
cl
≤
1200V; V
cc
= 150V; V
BB
= -5V; L
B
= 1µH;L
c
=
200µH
April 1999
5
Rev 1.000
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