STM8S103K3 STM8S103F3 STM8S103F2
Access line, 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, data
EEPROM,10-bit ADC, 3 timers, UART, SPI, I²C
•
Permanently active, low consumption power-on
and power-down reset
Interrupt management
Nested interrupt controller with 32 interrupts
LQFP32 7x7
UFQFPN32 5x5
•
•
Up to 27 external interrupts on 6 vectors
•
Timers
Advanced control timer: 16-bit, 4 CAPCOM
channels, 3 complementary outputs, dead-time
insertion and flexible synchronization
TSSOP20
SO20W 300 mils
UFQFPN20 3x3
Features
Core
16 MHz advanced STM8 core with Harvard
architecture and 3-stage pipeline
purpose timer,
•
16-bit generalOC or PWM) with 3 CAPCOM
channels (IC,
•
8-bit basic timer with 8-bit prescaler
•
Auto wake-up timer
•
Window watchdog and independent watchdog
timers
Communications interfaces
UART with clock output for synchronous
operation, Smartcard, IrDA, LIN master mode
•
•
Extended instruction set
Memories
Program memory: 8 Kbytes Flash; data retention
20 years at 55 °C after 10 kcycles
•
•
Data memory: 640 bytes true data EEPROM;
endurance 300 kcycles
•
RAM: 1 Kbytes
Clock, reset and supply management
2.95 to 5.5 V operating voltage
•
•
SPI interface up to 8 Mbit/s
•
I C interface up to 400 Kbit/s
2
Analog to digital converter (ADC)
10-bit, ±1 LSB ADC with up to 5 multiplexed
channels, scan mode and analog watchdog
•
•
clock
4 master
•
Flexible powercontrol, resonator clock sources:
oscillator
-
Low crystal
-
External clock input
-
Internal, user-trimmable 16 MHz RC
-
Internal low power 128 kHz RC
•
Clock security system with clock monitor
•
Power management: (wait, active-halt, halt)
-
Low power modes
-
Switch-off peripheral clocks individually
September 2010
I/Os
Up to 28 I/Os on a 32-pin package including 21
high sink outputs
•
•
Highly robust I/O design, immune against current
injection
•
Development supportwire interface module
single
-
Embedded fast on-chip programming and
(SWIM) for
non intrusive debugging
Unique ID
96-bit unique key for each device
•
DocID15441 Rev 6
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Contents
STM8S103K3 STM8S103F3 STM8S103F2
Contents
1
2
3
4
Introduction ..............................................................................................................8
Description ...............................................................................................................9
Block diagram ........................................................................................................10
Product overview ...................................................................................................11
4.1 Central processing unit STM8 .....................................................................................11
4.2 Single wire interface module (SWIM) and debug module (DM) ..................................11
4.3 Interrupt controller .......................................................................................................12
4.4 Flash program and data EEPROM memory ................................................................12
4.5 Clock controller ............................................................................................................13
4.6 Power management ....................................................................................................14
4.7 Watchdog timers ..........................................................................................................14
4.8 Auto wakeup counter ...................................................................................................15
4.9 Beeper ........................................................................................................................15
4.10 TIM1 - 16-bit advanced control timer .........................................................................15
4.11 TIM2 - 16-bit general purpose timer ..........................................................................16
4.12 TIM4 - 8-bit basic timer ..............................................................................................16
4.13 Analog-to-digital converter (ADC1) ............................................................................16
4.14 Communication interfaces .........................................................................................17
4.14.1 UART1 ...............................................................................................17
4.14.2 SPI .....................................................................................................18
4.14.3 I²C ......................................................................................................18
5 Pinout and pin description ...................................................................................19
5.1 STM8S103Kx UFQFPN32/LQFP32 pinout and pin description ..................................19
5.2 STM8S103Fx TSSOP20/SO20/UFQFPN20 pinout and pin description .....................22
5.2.1 STM8S103Fx TSSOP20/SO20 pinout .................................................22
5.2.2 STM8S103Fx UFQFPN20 pinout ........................................................23
5.2.3 STM8S103Fx TSSOP20/SO20/UFQFPN20 pin description ................24
5.3 Alternate function remapping .......................................................................................25
6 Memory and register map .....................................................................................26
6.1 Memory map
6.2 Register map
6.2.1
6.2.2
................................................................................................................26
...............................................................................................................27
I/O port hardware register map ............................................................27
General hardware register map ..........................................................28
.....................38
6.2.3 CPU/SWIM/debug module/interrupt controller registers
7 Interrupt vector mapping ......................................................................................40
8 Option bytes ...........................................................................................................42
8.1 Alternate function remapping bits ................................................................................44
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STM8S103K3 STM8S103F3 STM8S103F2
Contents
9 Unique ID ................................................................................................................47
10 Electrical characteristics ....................................................................................48
10.1 Parameter conditions .................................................................................................48
10.1.1 Minimum and maximum values .........................................................48
10.1.2 Typical values .....................................................................................48
10.1.3 Typical curves ....................................................................................48
10.1.4 Loading capacitor ...............................................................................48
10.1.5 Pin input voltage .................................................................................49
10.2 Absolute maximum ratings ........................................................................................49
10.3 Operating conditions ..................................................................................................51
10.3.1 VCAP external capacitor ....................................................................52
10.3.2 Supply current characteristics ............................................................53
10.3.3 External clock sources and timing characteristics .............................63
10.3.4 Internal clock sources and timing characteristics ...............................65
10.3.5 Memory characteristics ......................................................................68
10.3.6 I/O port pin characteristics .................................................................69
10.3.7 Reset pin characteristics ....................................................................77
10.3.8 SPI serial peripheral interface ............................................................79
2
10.3.9 I C interface characteristics ...............................................................82
10.3.10 10-bit ADC characteristics ................................................................83
10.3.11 EMC characteristics .........................................................................87
11 Package information ............................................................................................91
11.1 32-pin LQFP package mechanical data .....................................................................91
11.2 32-lead UFQFPN package mechanical data .............................................................93
11.3 20-lead UFQFPN package mechanical data .............................................................94
11.4 20-pin TSSOP package mechanical data ..................................................................96
11.5 20-pin SO package mechanical data .........................................................................97
11.6 UFQFPN recommended footprint ..............................................................................98
12 Thermal characteristics ....................................................................................100
12.1 Reference document ...............................................................................................101
12.2 Selecting the product temperature range ................................................................101
13 Ordering information .........................................................................................102
13.1 STM8S103 FASTROM microcontroller option list ...................................................103
14 STM8 development tools ..................................................................................108
14.1 Emulation and in-circuit debugging tools .................................................................108
14.2 Software tools ..........................................................................................................108
14.2.1 STM8 toolset ....................................................................................109
14.2.2 C and assembly toolchains ..............................................................109
14.3 Programming tools ..................................................................................................109
15 Revision history .................................................................................................110
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List of tables
STM8S103K3 STM8S103F3 STM8S103F2
List of tables
Table 1. STM8S103xx access line features .............................................................................................9
Table 2. Peripheral clock gating bit assignments in CLK_PCKENR1/2 registers ..................................14
Table 3. TIM timer features ....................................................................................................................16
Table 4. Legend/abbreviations for pinout tables ...................................................................................19
Table 5. UFQFPN32/LQFP32 pin description ........................................................................................20
Table 6. STM8S103Fx pin description ...................................................................................................24
Table 7. I/O port hardware register map ................................................................................................27
Table 8. General hardware register map ...............................................................................................28
Table 9. CPU/SWIM/debug module/interrupt controller registers .........................................................38
Table 10. Interrupt mapping ...................................................................................................................40
Table 11. Option bytes .........................................................................................................................110
Table 12. Option byte description ...........................................................................................................42
Table 13. STM8S103K alternate function remapping bits for 32-pin devices ........................................44
Table 14. STM8S103F alternate function remapping bits for 20-pin devices ........................................45
Table 15. Unique ID registers (96 bits) .................................................................................................110
Table 16. Voltage characteristics ...........................................................................................................49
Table 17. Current characteristics ...........................................................................................................50
Table 18. Thermal characteristics ..........................................................................................................50
Table 19. General operating conditions .................................................................................................51
Table 20. Operating conditions at power-up/power-down ......................................................................52
Table 21. Total current consumption with code execution in run mode at V
DD
= 5 V .............................53
Table 22. Total current consumption with code execution in run mode at V
DD
= 3.3 V ..........................54
Table 23. Total current consumption in wait mode at V
DD
= 5 V ............................................................55
Table 24. Total current consumption in wait mode at V
DD
= 3.3 V .........................................................55
Table 25. Total current consumption in active halt mode at V
DD
= 5 V ..................................................56
Table 26. Total current consumption in active halt mode at V
DD
= 3.3 V ...............................................57
Table 27. Total current consumption in halt mode at V
DD
= 5 V .............................................................58
Table 28. Total current consumption in halt mode at V
DD
= 3.3 V ..........................................................58
Table 29. Wakeup times .........................................................................................................................58
Table 30. Total current consumption and timing in forced reset state ....................................................59
Table 31. Peripheral current consumption .............................................................................................60
Table 32. HSE user external clock characteristics .................................................................................63
Table 33. HSE oscillator characteristics .................................................................................................64
Table 34. HSI oscillator characteristics ..................................................................................................65
Table 35. LSI oscillator characteristics ...................................................................................................67
Table 36. RAM and hardware registers ..................................................................................................68
Table 37. Flash program memory/data EEPROM memory ....................................................................68
Table 38. I/O static characteristics .........................................................................................................69
Table 39. Output driving current (standard ports) ..................................................................................71
Table 40. Output driving current (true open drain ports) ........................................................................71
Table 41. Output driving current (high sink ports) ..................................................................................72
Table 42. NRST pin characteristics ........................................................................................................77
Table 43. SPI characteristics ..................................................................................................................80
2
Table 44. I C characteristics ..................................................................................................................82
Table 45. ADC characteristics ................................................................................................................84
Table 46. ADC accuracy with R
AIN
< 10 kΩ , V
DD
= 5 V .........................................................................84
Table 47. ADC accuracy with R
AIN
< 10 kΩ R
AIN
, V
DD
= 3.3 V ..............................................................85
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STM8S103K3 STM8S103F3 STM8S103F2
List of tables
Table 48. EMS data ................................................................................................................................88
Table 49. EMI data .................................................................................................................................88
Table 50. ESD absolute maximum ratings .............................................................................................89
Table 51. Electrical sensitivities .............................................................................................................90
Table 52. 32-pin low profile quad flat package mechanical data ............................................................91
Table 53. 32-lead, ultra thin, fine pitch quad flat no-lead package mechanical data .............................93
Table 54. 20-lead, ultra thin, fine pitch quad flat no-lead package (3 x 3) package mechanical data ....95
Table 55. 20-pin, 4.40 mm body, 0.65 mm pitch mechanical data .........................................................97
Table 56. 20-lead, plastic small outline (300 mils) mechanical data ......................................................97
Table 57. Thermal characteristics ........................................................................................................100
Table 58. Document revision history ....................................................................................................110
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