LPC1853JET256 datasheet, PDF - EEWORLD Datasheet

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LPC1853JET256: Description32-BIT, FLASH, 180 MHz, RISC MICROCONTROLLER, PBGA256; Categorysemiconductor The embedded processor and controller; File Size2MB，147 Pages; ManufacturerPhilips Semiconductors (NXP Semiconductors N.V.); Websitehttps://www.nxp.com/

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LPC1853JET256 Overview

32-BIT, FLASH, 180 MHz, RISC MICROCONTROLLER, PBGA256

LPC1853JET256 Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	256
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	3.6 V
Minimum supply/operating voltage	2.2 V
Rated supply voltage	3.3 V
External data bus width	32
Number of input and output buses	164
Line speed	180 MHz
Processing package description	17 × 17 MM, 1 MM HEIGHT, PLASTIC, MO-192, SOT740-2, LBGA-256
Lead-free	Yes
EU RoHS regulations	Yes
China RoHS regulations	Yes
state	ACTIVE
Craftsmanship	CMOS
packaging shape	SQUARE
Package Size	GRID array, low PROFILE
surface mount	Yes
Terminal form	BALL
Terminal spacing	1 mm
terminal coating	NOT SPECIFIED
Terminal location	BOTTOM
Packaging Materials	Plastic/Epoxy
Temperature level	INDUSTRIAL
ADC channel	Yes
Address bus width	24
Number of digits	32
Maximum FCLK clock frequency	25 MHz
DAC channel	Yes
DMA channel	Yes
Microprocessor type	Reduced Instruction Set Microcontroller
PWM channel	Yes
ROM programming	FLASH

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LPC185x/3x/2x/1x

32-bit ARM Cortex-M3 MCU; up to 1 MB flash and 136 kB

SRAM; Ethernet, two High-speed USB, LCD, EMC

Rev. 4 — 31 October 2012

Preliminary data sheet

1. General description

The LPC185x/3x/2x/1x are ARM Cortex-M3 based microcontrollers for embedded

applications. The ARM Cortex-M3 is a next generation core that offers system

enhancements such as low power consumption, enhanced debug features, and a high

level of support block integration.

The LPC185x/3x/2x/1x operate at CPU frequencies of up to 180 MHz. The ARM

Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with

separate local instruction and data buses as well as a third bus for peripherals. The ARM

Cortex-M3 CPU also includes an internal prefetch unit that supports speculative

branching.

The LPC185x/3x/2x/1x include up to 1 MB of flash and 136 kB of on-chip SRAM, 16 kB of

EEPROM memory, a quad SPI Flash Interface (SPIFI), a State Configurable Timer (SCT)

subsystem, two High-speed USB controllers, Ethernet, LCD, an external memory

controller, and multiple digital and analog peripherals.

2. Features and benefits



Processor core



ARM Cortex-M3 processor, running at CPU frequencies of up to 180 MHz.



ARM Cortex-M3 built-in Memory Protection Unit (MPU) supporting eight regions.



ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).



Non-maskable Interrupt (NMI) input.



JTAG and Serial Wire Debug, serial trace, eight breakpoints, and four watch points.



Enhanced Trace Module (ETM) and Enhanced Trace Buffer (ETB) support.



System tick timer.



On-chip memory



Up to 1 MB on-chip dual bank flash memory with flash accelerator.



16 kB on-chip EEPROM data memory.



136 kB SRAM for code and data use.



Multiple SRAM blocks with separate bus access.



64 kB ROM containing boot code and on-chip software drivers.



64 bit of One-Time Programmable (OTP) memory for general-purpose use.



Clock generation unit



Crystal oscillator with an operating range of 1 MHz to 25 MHz.



12 MHz internal RC oscillator trimmed to 2 % accuracy over temperature and

voltage (1 % accuracy for T

amb

= 0 °C to 85 °C).

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