Operating Temperature Range (Note 4)....–40°C to 85°C
Specified Temperature Range (Note 5) ....–40°C to 85°C
Junction Temperature ........................................... 150°C
Storage Temperature Range...................–65°C to 150°C
UF PACKAGE
20-LEAD (4mm 4mm) PLASTIC QFN
T
JMAX
= 150°C,
θ
JA
= 37°C/W,
θ
JC
= 4.3°C/W
EXPOSED PAD (PIN 21) IS V
–
, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC6601CUF-2#PBF
LTC6601IUF-2#PBF
TAPE AND REEL
LTC6601CUF-2#TRPBF
LTC6601IUF-2#TRPBF
PART MARKING*
66012
66012
PACKAGE DESCRIPTION
20-Lead (4mm × 4mm) Plastic QFN
20-Lead (4mm × 4mm) Plastic QFN
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
DC ELECTRICAL CHARACTERISTICS
+
The
l
denotes the specifications which apply over the full operating
–
+
SYMBOL
V
OSDIFF
(Note 6)
ΔV
OSDIFF
/ΔT
(Note 6)
R
IN
(Note 14)
PARAMETER
Amplifier Differential Offset Voltage (Input
Referred)
Ampifier Differential Offset Voltage Drift
(Input Referred)
CONDITIONS
V
S
= 2.7V to 5.25V, BIAS = Floating
BIAS = V
+
V
S
= 2.7V to 5.25V
l
l
temperature range, otherwise specifications are at T
A
= 25°C. V = 3V, V = 0V, V
INCM
= V
OCM
= mid-supply, BIAS tied to V or floating,
I
LOAD
= 0, R
BAL
= 100k. The filter is configured for a gain of 1 unless otherwise noted. V
S
is defined as (V
+
– V
–
). V
OUTCM
is defined as
(V
OUT+
+ V
OUT–
)/2. V
INCM
is defined as (V
INP
+ V
INM
)/2. V
OUTDIFF
is defined as (V
OUT+
– V
OUT–
). V
INDIFF
is defined as (V
INP
– V
INM
). See
Figure 1.
MIN
TYP
±0.25
±0.25
1
MAX
±2
±1.25
UNITS
mV
mV
μV/°C
Input Resistance, BIAS = V
+
Single Ended Input Resistance, Pin 2 or Pin 4 V
S
= 3V
Differential Input Resistance
V
S
= 3V
133
200
Ω
Ω
66012f
2
LTC6601-2
DC ELECTRICAL CHARACTERISTICS
+
The
l
denotes the specifications which apply over the full operating
–
+
SYMBOL
ΔR
IN
(Note 14)
I
B
(Note 7)
I
OS
(Note 7)
V
INCM
(Note 8)
PARAMETER
CONDITIONS
l
temperature range, otherwise specifications are at T
A
= 25°C. V = 3V, V = 0V, V
INCM
= V
OCM
= mid-supply, BIAS tied to V or floating,
I
LOAD
= 0, R
BAL
= 100k. The filter is configured for a gain of 1 unless otherwise noted. V
S
is defined as (V
+
– V
–
). V
OUTCM
is defined as
(V
OUT+
+ V
OUT–
)/2. V
INCM
is defined as (V
INP
+ V
INM
)/2. V
OUTDIFF
is defined as (V
OUT+
– V
OUT–
). V
INDIFF
is defined as (V
INP
– V
INM
). See
Figure 1.
MIN
TYP
±0.25
–25
–50
–12.5
–25
±1
±1
0
0
±5
±10
MAX
UNITS
Ω
μA
μA
μA
μA
Input Resistance Match, BIAS = V
+
Single Ended Input Resistance, Pin 2 or Pin 4 V
S
= 3V
Internal Amplifier Input Bias
Internal Amplifier Input Offset
Input Signal Common Mode Range
(V
INP
+ V
INM
)/2
BIAS = V
+
, V
OCM
= 2.5V
BIAS = V
+
, V
OCM
= 1.5V
BIAS Pin Floating, V
OCM
= 2.5V
BIAS Pin Floating, V
OCM
= 1.5V
CMRRI
(Notes 9, 14)
CMRRO
(Notes 9, 14)
PSRR (Note 10)
Input Common Mode Rejection Ratio
(Amplifier Input Referred)
ΔV
INCM
/ΔV
OSDIFF
ΔV
INCM
= 2.5V
Output Common Mode Rejection Ratio
(Amplifier Input Referred)
ΔV
OCM
/ΔV
OSDIFF
ΔV
OCM
= 1V
Power Supply Rejection Ratio
(Amplifier Input Referred)
ΔV
S
/ΔV
OSDIFF
BIAS Pin Floating
BIAS = V
+
V
S
= 2.7V to 5V
V
S
= 2.7V to 5V
BIAS = Floating
BIAS = V
+
BIAS = Floating
BIAS = V
+
l
l
l
l
V
S
= 5V
V
S
= 3V
V
S
= 5V
V
S
= 3V
l
l
l
l
0
0
0
0
4.7
1.7
4.8
1.8
V
V
V
V
V
S
= 5V
74
dB
V
S
= 5V
70
dB
V
S
= 2.7V to 5V
V
S
= 2.7V to 5V
l
l
l
58
58
40
94
81
51
1
dB
dB
dB
V/V
±1.0
–40
–40
±30
±30
%
dB
dB
mV
mV
μV/°C
μV/°C
1.8
4
1.7
4
V
V
V
V
kΩ
V
PSRRCM (Note 10) Common Mode Power Supply Rejection Ratio
(ΔV
S
/ΔV
OSCM
)
V
S
= 2.7V to 5V
g
cm
Common Mode Gain (ΔV
OUTCM
/ΔV
OCM
)
ΔV
OCM
= 2V
Common Mode Gain Error = 100 • (g
cm
– 1)
ΔV
OCM
= 2V
BAL
Output Balance (ΔV
OUTCM
/ΔV
OUTDIFF
)
Single-Ended Input
Differential Input
Common Mode Offset Voltage
(V
OUTCM
– V
OCM
)
Common Mode Offset Voltage Drift
(V
OUTCM
– V
OCM
)
Output Signal Common Mode Range
(Voltage Range for the V
OCM
Pin)
V
S
= 5V
V
S
= 5V
ΔV
OUTDIFF
= 2V
V
S
= 5V
V
S
= 5V
V
S
= 2.7V to 5V
V
S
= 2.7V to 5V
V
S
= 2.7V to 5V
V
S
= 2.7V to 5V
V
S
= 3V
V
S
= 5V
V
S
= 3V
V
S
= 5V
V
S
= 3V
V
S
= 3V
BIAS = Floating
BIAS = V
+
BIAS = Floating
BIAS = V
+
BIAS Pin Floating
BIAS Pin Floating
BIAS = V
+
BIAS = V
+
l
l
l
l
l
l
l
l
l
l
l
l
l
±0.3
–58
–62
±15
±15
20
20
1.1
1.1
1.1
1.1
5
1.475
7
1.5
V
OSCM
ΔV
OSCM
/ΔT
V
OUTCMR
(Note 8)
R
INVOCM
V
MID
Input Resistance, V
OCM
Pin
Voltage at the V
OCM
PIn
9
1.525
66012f
3
LTC6601-2
DC ELECTRICAL CHARACTERISTICS
+
The
l
denotes the specifications which apply over the full operating
–
+
SYMBOL
V
OUT
PARAMETER
Output Voltage, High, Either Output Pin
(Note 11)
CONDITIONS
V
S
= 3V, I
L
= 0mA, BIAS Pin Floating
V
S
= 3V, I
L
= –5mA, BIAS Pin Floating
V
S
= 3V, I
L
= –20mA, BIAS Pin Floating
V
S
= 5V, I
L
= 0mA, BIAS Pin Floating
V
S
= 5V, I
L
= –5mA, BIAS Pin Floating
V
S
= 5V, I
L
= –20mA, BIAS Pin Floating
V
S
= 3V, I
L
= 0mA
V
S
= 3V, I
L
= –5mA
V
S
= 3V, I
L
= –20mA
V
S
= 5V, I
L
= 0mA
V
S
= 5V, I
L
= –5mA
V
S
= 5V, I
L
= –20mA
Output Voltage, Low, Either Output Pin
(Note 11)
BIAS = V
+
BIAS = V
+
BIAS = V
+
BIAS = V
+
BIAS = V
+
BIAS = V
+
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
temperature range, otherwise specifications are at T
A
= 25°C. V = 3V, V = 0V, V
INCM
= V
OCM
= mid-supply, BIAS tied to V or floating,
I
LOAD
= 0, R
BAL
= 100k. The filter is configured for a gain of 1 unless otherwise noted. V
S
is defined as (V
+
– V
–
). V
OUTCM
is defined as
(V
OUT+
+ V
OUT–
)/2. V
INCM
is defined as (V
INP
+ V
INM
)/2. V
OUTDIFF
is defined as (V
OUT+
– V
OUT–
). V
INDIFF
is defined as (V
INP
– V
INM
). See
Figure 1.
MIN
TYP
240
290
470
370
430
650
245
285
415
350
390
550
110
120
170
150
170
225
120
135
195
175
200
270
±45
±60
2.7
15.8
16
16.7
32
32.2
33
0.4
0.45
0.65
V
–
V
–
+ 1.0
V
–
+ 2.3
100
V
–
+ 1.05
150
V
–
+
1.15
400
400
±65
±90
5.25
23
23.5
24.5
41
41.5
43
1
1.1
1.8
V
–
+ 0.4
V
–
+ 1.5
V
+
200
V
–
+ 1.25
MAX
450
525
850
675
775
1100
450
525
750
625
700
1000
200
225
300
270
300
400
225
250
350
325
360
475
UNITS
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
V
V
V
kΩ
V
ns
ns
V
S
= 3V, I
L
= 0mA, BIAS Pin Floating
V
S
= 3V, I
L
= 5mA, BIAS Pin Floating
V
S
= 3V, I
L
= 20mA, BIAS Pin Floating
V
S
= 5V, I
L
= 0mA, BIAS Pin Floating
V
S
= 5V, I
L
= 5mA, BIAS Pin Floating
V
S
= 5V, I
L
= 20mA, BIAS Pin Floating
V
S
= 3V, I
L
= 0mA
V
S
= 3V, I
L
= 5mA
V
S
= 3V, I
L
= 20mA
V
S
= 5V, I
L
= 0mA
V
S
= 5V, I
L
= 5mA
V
S
= 5V, I
L
= 20mA
BIAS = V
+
BIAS = V
+
BIAS = V
+
BIAS = V
+
BIAS = V
+
BIAS = V
+
I
SC
V
S
I
S
Output Short-Circuit Current,
Either Output Pin (Note 12)
Supply Voltage Range
Supply Current, BIAS Pin Floating
V
S
= 3V
V
S
= 5V
V
S
= 2.7V
V
S
= 3V
V
S
= 5V
V
S
= 2.7V
V
S
= 3V
V
S
= 5V
V
S
= 2.7V
V
S
= 3V
V
S
= 5V
V
S
= 2.7V to 5V
V
S
= 2.7V to 5V
V
S
= 2.7V to 5V
V
S
= 2.7V to 5V
V
S
= 2.7V to 5V
V
S
= 3V, V
SHDN
= 0.25V to 3V
V
S
= 3V, V
SHDN
= 3V to 0.25V
Supply Current, BIAS Pin Tied to V
+
I
SHDN
Supply Current, BIAS Pin Tied to V
–
V
BIASSD
V
BIASLP
(Note 13)
V
BIASHP
R
BIAS
V
BIAS
t
ON
t
OFF
BIAS Input Pin Range for Shutdown
BIAS Input for Low Power Operation
BIAS Input for High Performance Operation
BIAS Input Resistance
BIAS Float Voltage
Turn-On Time
Turn-Off Time
66012f
4
LTC6601-2
AC ELECTRICAL CHARACTERISTICS
+
The
l
denotes the specifications which apply over the full operating
–
+
SYMBOL
GAIN
PARAMETER
Filter Gain, See Figure 2,
BIAS Pin Floating (Remaining AC
Measurements Relative to 1MHz)
CONDITIONS
ΔV
IN
= ±0.25V, f
TEST
= DC (Note 14)
V
IN
= 600mV
P-P
, f
TEST
= 1MHz
V
IN
= 600mV
P-P
, f
TEST
= 2MHz
V
IN
= 600mV
P-P
, f
TEST
= 5MHz
V
IN
= 600mV
P-P
, f
TEST
= 10MHz
V
IN
= 600mV
P-P
, f
TEST
= 14.45MHz
V
IN
= 600mV
P-P
, f
TEST
= 20MHz
V
IN
= 600mV
P-P
, f
TEST
= 50MHz
ΔV
IN
= ±0.25V, f
TEST
= DC
V
IN
= 600mV
P-P
, f
TEST
= 1MHz
V
IN
= 600mV
P-P
, f
TEST
= 2MHz
V
IN
= 600mV
P-P
, f
TEST
= 5MHz
V
IN
= 600mV
P-P
, f
TEST
= 10MHz
V
IN
= 600mV
P-P
, f
TEST
= 14.45MHz
V
IN
= 600mV
P-P
, f
TEST
= 20MHz
V
IN
= 600mV
P-P
, f
TEST
= 50MHz
BW = 100MHz
BW = 20MHz
BW = 100MHz
BW = 20MHz
HD2, Single-Ended Input
HD3, Single-Ended Input
HD2, Differential Input
HD3, Differential Input
ΔV
IN
= ±0.25V, f
TEST
= DC (Note 14)
V
IN
= 600mV
P-P
, f
TEST
= 1MHz
V
IN
= 600mV
P-P
, f
TEST
= 2MHz
V
IN
= 600mV
P-P
, f
TEST
= 5MHz
V
IN
= 600mV
P-P
, f
TEST
= 10MHz
V
IN
= 600mV
P-P
, f
TEST
= 14.45MHz
V
IN
= 600mV
P-P
, f
TEST
= 20MHz
V
IN
= 600mV
P-P
, f
TEST
= 50MHz
ΔV
IN
= ±0.25V, f
TEST
= DC
V
IN
= 600mV
P-P
, f
TEST
= 1MHz
V
IN
= 600mV
P-P
, f
TEST
= 2MHz
V
IN
= 600mV
P-P
, f
TEST
= 5MHz
V
IN
= 600mV
P-P
, f
TEST
= 10MHz
V
IN
= 600mV
P-P
, f
TEST
= 14.45MHz
V
IN
= 600mV
P-P
, f
TEST
= 20MHz
V
IN
= 600mV
P-P
, f
TEST
= 50MHz
BW = 100MHz
BW = 20MHz
BW = 100MHz
BW = 20MHz
HD2, Single-Ended Input
HD3, Single-Ended Input
HD2, Differential Input
HD3, Differential Input
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
temperature range, otherwise specifications are at T
A
= 25°C. V = 3V, V = 0V, V
INCM
= V
OCM
= mid-supply, V
BIAS
is tied to V or
floating, unless otherwise noted. (See Figure 2 for the AC test configuration.) V
京公网安备 11010802033920号
EEWORLD
