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BUZ346S2

Description
SIPMOS Power Transistor (N channel Enhancement mode Avalanche-rated)
CategoryDiscrete semiconductor    The transistor   
File Size125KB,9 Pages
ManufacturerSIEMENS
Websitehttp://www.infineon.com/
Download Datasheet Parametric Compare View All

BUZ346S2 Overview

SIPMOS Power Transistor (N channel Enhancement mode Avalanche-rated)

BUZ346S2 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSIEMENS
package instructionFLANGE MOUNT, R-PSFM-T3
Reach Compliance Codeunknown
ECCN codeEAR99
Avalanche Energy Efficiency Rating (Eas)72 mJ
ConfigurationSINGLE
Minimum drain-source breakdown voltage60 V
Maximum drain current (Abs) (ID)58 A
Maximum drain current (ID)58 A
Maximum drain-source on-resistance0.018 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
Maximum feedback capacitance (Crss)750 pF
JEDEC-95 codeTO-218AA
JESD-30 codeR-PSFM-T3
JESD-609 codee0
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formFLANGE MOUNT
Polarity/channel typeN-CHANNEL
Maximum power consumption environment170 W
Maximum power dissipation(Abs)170 W
Maximum pulsed drain current (IDM)232 A
Certification statusNot Qualified
surface mountNO
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal locationSINGLE
transistor applicationsSWITCHING
Transistor component materialsSILICON
Maximum off time (toff)890 ns
Maximum opening time (tons)290 ns
Base Number Matches1
BUZ 346 S2
Not for new design
SIPMOS
®
Power Transistor
• N channel
• Enhancement mode
• Avalanche-rated
Pin 1
G
Pin 2
D
Pin 3
S
Type
BUZ 346 S2
V
DS
60 V
I
D
58 A
R
DS(on)
0.018
Package
TO-218 AA
Ordering Code
C67078-S3120-A4
Maximum Ratings
Parameter
Continuous drain current
Symbol
Values
58
Unit
A
I
D
I
Dpuls
232
T
C
= 73 °C
Pulsed drain current
T
C
= 25 °C
Avalanche current,limited by
T
jmax
Avalanche energy,periodic limited by
T
jmax
Avalanche energy, single pulse
I
AR
E
AR
E
AS
58
4.5
mJ
I
D
= 58 A,
V
DD
= 25 V,
R
GS
= 25
L
= 21.4 µH,
T
j
= 25 °C
Gate source voltage
Power dissipation
72
V
GS
P
tot
±
20
170
V
W
T
C
= 25 °C
Operating temperature
Storage temperature
Thermal resistance, chip case
Thermal resistance, chip to ambient
DIN humidity category, DIN 40 040
IEC climatic category, DIN IEC 68-1
Semiconductor Group
T
j
T
stg
R
thJC
R
thJA
-55 ... + 150
-55 ... + 150
0.74
75
C
55 / 150 / 56
°C
K/W
1
07/96

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BUZ346S2 C67078-S3120-A4
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