DATASHEET
IS-1825xSRH, IS-1825BSEH, ISL71823xSRH
Single Event and Total Dose Hardened, High-Speed Dual Output PWMs
FN9065
Rev.7.01
Jan 6, 2022
The
IS-1825ASRH, IS-1825BSRH, IS-1825BSEH,
ISL71823ASRH,
and
ISL71823BSRH
are single event
and total dose hardened pulse width modulators designed
to be used in high-frequency switching power supplies in
either voltage or current-mode configurations. These
devices include a precision voltage reference, a low
power start-up circuit, a high-frequency oscillator, a
wide-band error amplifier, and a fast current-limit
comparator.
The IS-1825xSRH and IS-1825xSEH feature dual,
alternating output operating from zero to less than 50%
duty cycle, and the ISL71823xSRH features dual
in-phase output operating from zero to less than 100%
duty cycle. The B versions of the parts test the delay from
clock out to PWM output switching after power has been
applied to the modulator (t
PWM
) (see
Figure 2 on page 9).
The SEH parts are wafer-by-wafer acceptance tested to
50krad(Si) at a low dose rate of <10mrad(Si)/s.
Constructed with the Rad-hard Silicon Gate (RSG)
dielectrically isolated BiCMOS process, these devices
are immune to single-event latch-up and have been
specifically designed to provide a high level of immunity
to single-event transients. All specified parameters are
established and tested for 300krad(Si) total dose
performance.
The devices are offered in a 16 Ld CDIP or a 20 Ld
CDFP and fully specified to across the temperature range
of -50°C to +125°C.
Features
• Electrically screened to DLA SMD
5962-02511
• QML qualified per MIL-PRF-38535 requirements
• Oscillator frequency: 1MHz (max)
• High output drive current: 1A peak (typ)
• Low startup current: 300µA (max)
• Undervoltage Lockout
• Start threshold: 8.8V (max)
• Stop threshold: 7.6V (min)
• Hysteresis: 300mV (min)
• Pulse-by-pulse current limiting
• Programmable leading edge blanking
• Radiation acceptance testing - IS-1825xSRH,
ISL71823xSRH
• High Dose Rate (HDR) (50-300rad(Si)/s):
300krad(Si)
• Radiation acceptance testing - IS-1825BSEH
• High Dose Rate (HDR) (50-300rad(Si)/s):
300krad(Si)
• Low Lose Rate (LDR) (0.01rad(Si)/s): 50krad(Si)
• Latch-up immune (dielectrically isolated)
• SEE hardness (see SEE report for details)
• SEU immune: LET= 35MeV•cm
2
/mg
Applications
• Voltage or current mode switching power supplies
• Control of high current MOSFET drivers
• Motor speed and direction control
Table 1. Key Differences Between Family of Parts
Part Number
IS-1825ASRH
IS-1825BSRH
IS-1825BSEH
ISL71823ASRH
ISL71823BSRH
Dual Outputs
Out of Phase
Out of Phase
Out of Phase
In Phase
In Phase
Clock-to-PWM
Startup Test
-
Yes
Yes
-
Yes
FN9065 Rev.7.01
Jan 6, 2022
Page 1 of 24
© 2002 Renesas Electronics
IS-1825xSRH, IS-1825BSEH, ISL71823xSRH
Contents
1.
1.1
1.2
1.3
1.4
2.
2.1
2.2
2.3
2.4
2.5
3.
4.
4.1
4.2
5.
6.
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
4
5
5
Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
6
6
7
9
Typical Performance Curves. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Die and Assembly Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Metallization Mask Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Bond Pad Coordinates. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Package Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
FN9065 Rev.7.01
Jan 6, 2022
Page 2 of 24
IS-1825xSRH, IS-1825BSEH, ISL71823xSRH
1. Overview
1.
1.1
Overview
Functional Block Diagram
* T-FF disabled in
ISL71823SxH
RT
3.0V
I
CT
= I
RT
V
C
T
Q
V
C
Q
CT
1.0V/2.9V
LEB
OUTA
S
Q
I
D
5V
2.6V
10k
PGND
R
Q
CLK/LEB
0.93V
RAMP
EAOUT
V
C
OUTB
NI
EA
PGND
INV
ILIM
Current
Limit
Soft Start Charge
1.0V
SS
Over
Current
1.2V
S
Q
5V
Soft Start Discharge
S
Q
0.4V
R
Q
R
Q
V
CC
High When V
CC
= OK
UVLO-b
4V
V
REF
V
REF
Internal
Bias
5.1V
REF
On/Off
V
REF
Figure 1. Block Diagram
FN9065 Rev.7.01
Jan 6, 2022
Page 3 of 24
IS-1825xSRH, IS-1825BSEH, ISL71823xSRH
1. Overview
1.2
Ordering Information
Part Number
(Note 2)
IS0-1825ASRH/SAMPLE (Notes
3, 4)
IS0-1825ASRH-Q (Note
4)
IS1-1825ASRH-8
IS9-1825ASRH-8
IS1-1825ASRH-Q
IS9-1825ASRH-Q
IS1-1825ASRH/PROTO (Note
3)
IS9-1825ASRH/PROTO (Note
3)
ISL71823ASRHQD
ISL71823ASRHQF
ISL71823ASRHVD
ISL71823ASRHVF
ISL71823ASRHVX (Note
4)
ISL71823ASRHD/PROTO (Note
3)
ISL71823ASRHF/PROTO (Note
3)
ISL71823ASRHX/SAMPLE (Notes
3, 4)
IS0-1825BSRH-Q (Note
4)
IS1-1825BSRH-8
IS9-1825BSRH-8
IS1-1825BSRH-Q
IS9-1825BSRH-Q
ISL71823BSRHQD
ISL71823BSRHQF
ISL71823BSRHVD
ISL71823BSRHVF
ISL71823BSRHVX (Note
4)
IS0-1825BSEH-Q (Note
4)
IS1-1825BSEH-Q
IS9-1825BSEH-Q
HDR to 300krad(Si)
LDR to 50krad(Si)
N/A
N/A
N/A
HDR to 300krad(Si)
N/A
N/A
HDR to 300krad(Si)
Radiation Hardness
Assurance
(Total Ionizing Dose)
N/A
HDR to 300krad(Si)
Package
Descriptions
DIE
DIE
16 Ld SBDIP
20 Ld FP
16 Ld SBDIP
20 Ld FP
16 Ld SBDIP
20 Ld FP
16 Ld SBDIP
20 Ld FP
16 Ld SBDIP
20 Ld FP
DIE
16 Ld SBDIP
20 Ld FP
DIE
DIE
16 Ld SBDIP
20 Ld FP
16 Ld SBDIP
20 Ld FP
16 Ld SBDIP
20 Ld FP
16 Ld SBDIP
20 Ld FP
DIE
DIE
16 Ld SBDIP
20 Ld FP
Package
Drawing
-
-
D16.3
K20.A
D16.3
K20.A
D16.3
K20.A
D16.3
K20.A
D16.3
K20.A
-
D16.3
K20.A
-
-
D16.3
K20.A
D16.3
K20.A
D16.3
K20.A
D16.3
K20.A
-
-
D16.3
K20.A
Temp.
Range
-50 to
+125°C
Ordering SMD
Number
(Note 1)
N/A
5962F0251101V9A
5962F0251101QEC
5962F0251101QXC
5962F0251101VEC
5962F0251101VXC
N/A
N/A
5962F0251102QEC
5962F0251102QXC
5962F0251102VEC
5962F0251102VXC
5962F0251102V9A
N/A
N/A
N/A
5962F0251103V9A
5962F0251103QEC
5962F0251103QXC
5962F0251103VEC
5962F0251103VXC
5962F0251104QEC
5962F0251104QXC
5962F0251104VEC
5962F0251104VXC
5962F0251104V9A
5962F0251105V9A
5962F0251105VEC
5962F0251105VXC
Notes:
1. Specifications for Rad Hard QML devices are controlled by the Defense Logistics Agency Land and Maritime (DLA). The SMD
numbers listed must be used when ordering.
2. These Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and
compatible with both SnPb and Pb-free soldering operations.
3. The /PROTO and /SAMPLE are not rated or certified for Total Ionizing Dose (TID) or Single Event Effect (SEE) immunity. These
parts are intended for engineering evaluation purposes only. The /PROTO parts meet the electrical limits and conditions across
temperature specified in the DLA SMD and are in the same form and fit as the qualified device. The /SAMPLE parts are capable
of meeting the electrical limits and conditions specified in the DLA SMD. The /SAMPLE parts do not receive 100% screening
across temperature to the DLA SMD electrical limits. These part types do not come with a Certificate of Conformance because
they are not DLA qualified devices.
4. Die product tested at T
A
= + 25°C. The wafer probe test includes functional and parametric testing sufficient to make the die
capable of meeting the electrical performance outlined in
“Electrical Specifications” on page 7.
FN9065 Rev.7.01
Jan 6, 2022
Page 4 of 24
IS-1825xSRH, IS-1825BSEH, ISL71823xSRH
1. Overview
1.3
Pin Configuration
IS1-1825ASRH, IS1-1825BSRH, IS-1825BSEH
ISL71823BSRHVD, ISL71823ASRHQD
(CDIP2-T16 SBDIP)
TOP VIEW
IS9-1825ASRH, IS9-1825BSRH, IS9-1825BSEH
ISL71823ASRHQF, ISL71823BSRHVF
(CDFP4-F20 FLATPACK)
TOP VIEW
NC
INV
NON-INV
E/A OUT
CLK/LEB
RT
CT
RAMP
SS
NC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VREF
VCC
OUT B
PGND
VC
VC
PGND
OUT A
GND
ILIM/SD
INV 1
NON-INV 2
E/A OUT 3
CLK/LEB 4
RT 5
CT 6
RAMP 7
SS 8
16 VREF
15 VCC
14 OUT B
13 VC
12 PGND
11 OUT A
10 GND
9 ILIM/SD
1.4
Pin Name
INV
NON-INV
E/A OUT
CLK/LEB
R
T
C
T
RAMP
SS
ILIM/SD
GND
OUTA
PGND
V
C
OUTB
V
CC
V
REF
NC
Pin Descriptions
Pin Number
SBDIP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
-
Flatpack
2
3
4
5
6
7
8
9
11
12
13
14, 17
15, 16
18
19
20
1, 10
Inverting input for the error amplifier.
Non inverting input for the error amplifier.
Error amplifier output.
Clock out pin with leading edge blanking.
Timing resistor pin for programming the oscillator.
Timing capacitor pin for programming the oscillator.
Non inverting input to the PWM comparator with a 1.25V internal offset.
Soft-Start pin for controlling startup ramp time and inrush current.
Input to the current limit comparator.
Ground return for the analog circuitry.
High current totem pole output of the driver stage.
Ground return for the output driver stage.
Power supply pin for the output stage. Bypass this pin with a 0.1µF capacitor with low ESL
and minimize the trace length by placing it as close to the pin as possible.
High current totem pole output of the driver stage.
Power supply pin for the device. Bypass this pin with a 0.1µF capacitor with low ESL and
minimize the trace length by placing it as close to the pin as possible.
5.1V voltage reference.
Not electrically connected.
Description
FN9065 Rev.7.01
Jan 6, 2022
Page 5 of 24
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