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BUZ72AL

Description
SIPMOS Power Transistor (N channel Enhancement mode Avalanche-rated Logic Level)
CategoryDiscrete semiconductor    The transistor   
File Size114KB,9 Pages
ManufacturerSIEMENS
Websitehttp://www.infineon.com/
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BUZ72AL Overview

SIPMOS Power Transistor (N channel Enhancement mode Avalanche-rated Logic Level)

BUZ72AL Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSIEMENS
Parts packaging codeSFM
package instructionFLANGE MOUNT, R-PSFM-T3
Contacts3
Reach Compliance Codeunknow
ECCN codeEAR99
Is SamacsysN
Other featuresLOGIC LEVEL COMPATIBLE
Avalanche Energy Efficiency Rating (Eas)59 mJ
ConfigurationSINGLE
Minimum drain-source breakdown voltage100 V
Maximum drain current (Abs) (ID)9 A
Maximum drain current (ID)9 A
Maximum drain-source on-resistance0.25 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
Maximum feedback capacitance (Crss)150 pF
JEDEC-95 codeTO-220AB
JESD-30 codeR-PSFM-T3
JESD-609 codee0
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formFLANGE MOUNT
Polarity/channel typeN-CHANNEL
Maximum power consumption environment40 W
Maximum power dissipation(Abs)40 W
Maximum pulsed drain current (IDM)36 A
Certification statusNot Qualified
surface mountNO
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal locationSINGLE
transistor applicationsSWITCHING
Transistor component materialsSILICON
Maximum off time (toff)200 ns
Maximum opening time (tons)160 ns
Base Number Matches1
BUZ 72 AL
SIPMOS
®
Power Transistor
• N channel
• Enhancement mode
• Avalanche-rated
• Logic Level
Pin 1
G
Type
BUZ 72 AL
Pin 2
D
Pin 3
S
V
DS
100 V
I
D
9A
R
DS(on)
0.25
Package
TO-220 AB
Ordering Code
C67078-S1327-A3
Maximum Ratings
Parameter
Continuous drain current
Symbol
Values
9
Unit
A
I
D
I
Dpuls
36
T
C
= 25 °C
Pulsed drain current
T
C
= 25 °C
Avalanche current,limited by
T
jmax
Avalanche energy,periodic limited by
T
jmax
Avalanche energy, single pulse
I
AR
E
AR
E
AS
10
7.9
mJ
I
D
= 10 A,
V
DD
= 25 V,
R
GS
= 25
L
= 885 µH,
T
j
= 25 °C
Gate source voltage
Gate-source peak voltage,aperiodic
Power dissipation
59
V
GS
V
gs
P
tot
±
14
±
20
V
W
T
C
= 25 °C
Operating temperature
Storage temperature
Thermal resistance, chip case
Thermal resistance, chip to ambient
DIN humidity category, DIN 40 040
IEC climatic category, DIN IEC 68-1
40
T
j
T
stg
R
thJC
R
thJA
-55 ... + 150
-55 ... + 150
3.1
75
E
55 / 150 / 56
°C
K/W
Semiconductor Group
1
07/96

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