S25FL Family (Serial Peripheral Interface)
S25FL002D, S25FL001D
2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory
with 25 MHz SPI Bus Interface
PRELIMINARY
INFORMATION
Distinctive Characteristics
ARCHITECTURAL ADVANTAGES
Single power supply operation
— Full voltage range: 2.7 to 3.6 V read and program
operations
Memory Architecture
— 2 Mb – Four sectors with 512 Kb each
— 1 Mb – Four sectors with 256 Kb each
Program
— Page Program (up to 256 bytes) in 6 ms (typical)
— Program cycles are on a page by page basis
Erase
— 0.25 s typical sector erase time (S25FL001D)
— 0.5 s typical sector erase time (S25FL002D)
— 1.0 s typical bulk erase time (S25FL001D)
— 2.0 s typical bulk erase time (S25FL002D)
Endurance
— 100,000 cycles per sector typical
Data Retention
— 20 years typical
Device ID
— Electronic signature
Process Technology
— Manufactured on 0.25 µm process technology
Package Option
— Industry Standard Pinouts
— 150 mil 8-pin SO package for 1Mb and 2Mb
— 208 mil 8-pin SO package for 2Mb only
— 8-contact WSON leadless package (6x5 mm)
PERFORMANCE CHARACTERISTICS
Speed
— 25 MHz clock rate (maximum)
Power Saving Standby Mode
— Standby Mode 1 µA (typical)
Memory Protection Features
Memory Protection
— W# pin works in conjunction with Status Register Bits
to protect specified memory areas
— Status Register Block Protection bits (BP1, BP0) in
status register configure parts of memory as read-
only
SOFTWARE FEATURES
SPI Bus Compatible Serial Interface
Publication Number
30167
Revision
A
Amendment
+1
Issue Date
June 9, 2004
P r e l i m i n a r y
I n f o r m a t i o n
Table of Contents
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . .5
Input/Output Descriptions . . . . . . . . . . . . . . . . . . . 5
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . .6
Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . .7
SPI Modes ...................................................................................................7
Figure 1. Bus Master and Memory Devices on the SPI Bus ....... 8
Figure 2. SPI Modes Supported............................................ 8
Figure 11. Page Program (PP) Instruction Sequence.............. 20
Sector Erase (SE) .................................................................................. 20
Figure 12. Sector Erase (SE) Instruction Sequence ............... 21
Bulk Erase (BE) ....................................................................................... 21
Figure 13. Bulk Erase (BE) Instruction Sequence .................. 22
Software Protect (SP) ......................................................................... 22
Figure 14. Software Protection (SP) Instruction Sequence...... 23
Release from Software Protect (RES) .............................................23
Figure 15. Release from Software Protect (RES) Instruction
Sequence........................................................................ 24
Operating Features . . . . . . . . . . . . . . . . . . . . . . . . .9
Page Programming .................................................................................. 9
Sector Erase, or Bulk Erase ................................................................. 9
Polling During a Write, Program, or Erase Cycle ........................ 9
Status Register ......................................................................................... 9
Protection Modes ..................................................................................10
Table 1. Protected Area Sizes (S25FL002D). .........................10
Table 2. Protected Area Sizes (S25FL001D). .........................10
Release from Software Protection and Read Electronic Signature
(RES), and Read ID (READ_ID) ....................................................... 24
Figure 16. Release from Software Protection and Read Electronic
Signature (RES), and Read ID (READ_ID) Instruction
Sequence........................................................................ 25
Power-up and Power-down . . . . . . . . . . . . . . . . . 26
Figure 17. Power-Up Timing............................................... 26
Table 7. Power-Up Timing ................................................. 27
Hold Condition Modes ........................................................................10
Figure 3. Hold Condition Activation...................................... 11
Memory Organization . . . . . . . . . . . . . . . . . . . . . . 12
Table 3. Sector Address Table – S25FL002D .........................12
Table 4. Sector Address Table – S25FL001D .........................12
Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 5. Instruction Set. ....................................................13
Initial Delivery State . . . . . . . . . . . . . . . . . . . . . . .
Maximum Rating . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . .
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . .
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . .
27
27
27
27
28
29
Write Enable (WREN) ..........................................................................14
Figure 4. Write Enable (WREN) Instruction Sequence............. 14
Write Disable (WRDI) ........................................................................ 14
Figure 5. Write Disable (WRDI) Instruction Sequence ............ 14
Read Status Register (RDSR) ............................................................. 14
Figure 6. Read Status Register (RDSR) Instruction Sequence.. 15
Figure 7. Status Register Format......................................... 15
Figure 18. AC Measurements I/O Waveform......................... 29
Table 8. Test Specifications ............................................... 29
Table 9. AC Characteristics ................................................ 30
Figure 19. SPI Mode 0 (0,0) Input Timing ............................ 31
Figure 20. SPI Mode 0 (0,0) Output Timing.......................... 31
Figure 21. HOLD# Timing.................................................. 32
Figure 22. Write Protect Setup and Hold Timing during
WRSR when SRWD=1 ....................................................... 32
Write Status Register (WRSR) .......................................................... 16
Figure 8. Write Status Register (WRSR) Instruction Sequence. 16
Table 6. Protection Modes ..................................................17
Read Data Bytes (READ) .................................................................... 17
Figure 9. Read Data Bytes (READ) Instruction Sequence ........ 18
Read Data Bytes at Higher Speed (FAST_READ) ....................... 18
Figure 10. Fast Read (FAST_READ) Instruction Sequence ....... 19
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . 33
S08 narrow—8-pin Plastic Small Outline 150mils
Body Width Package ............................................................................33
S08 wide—8-pin Plastic Small Outline 208mils
Body Width Package ............................................................................34
8-Contact WSON (6mm x 5mm) Leadless Package .................36
Page Program (PP) ................................................................................. 19
June 9, 2004 30167A+1
S25FL Family (Serial Peripheral Interface)
3