APW8871
DDR4 TOTAL POWER SOLUTION (VPP/VDDQ/VTT)
SYNCHRONOUS DC/DC CONVERTER for NB/MB
Features
Provide 4 Independent Outputs for VPP, VDDQ, VTT LDO
and VTTREF LDO
VDDQ Converter
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Built in Fixed Valley Current Limit Protection
Built In Thermal Shutdown Function
+0.75A LDO Section (VTT)
Support Only 10µF MLCC for Stability on VTT LDO
VTT and VTTREF Track at Half the VDDQ by internal
divider
Built In 0.7 5A Source/Sink Capability on VTT LDO
and 10mA Source/Sink Capability on VTTREF LDO
Independent Current Limit Protection
Thermal Shutdown Protection
4mmx4mm 26-pin package (TQFN-26)
Halogen and Lead Free Available (RoHS Compliant)
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High Input Voltages Range from 4.5V to 25V Input
Power
Provide 1.2V (DDR4) or Adjustable Output Voltage
Max to 1.8V by SMBus Control
- +1% Accuracy over Temperature
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High Efficiency Performance up to 90%scale & Low
Shutdown Current <1uA
Integrated High_Side N-Channe l MOSFET 20mΩ
a nd Low_ Side N-Cha nne l MOSFET 10 m
Ω
@
VCC=5V
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Integrated Bootstrap Forward P-CH MOSFET
Built in Internal Soft-Sta rt: 0.4 ms(typ.) and Soft-
Stop Functions for PWM Output
Built In Automatic PFM/PWM Mode Selection
Fixed 800kHz Switching Frequency
S3 and S5 Pins Control The Device in S0, S3 or S4/
S5 State
Built In PMAX Signal for Total Power Indicator
Power Good Monitoring
60% Under-Voltage Protection (UVP)
125% Over-Voltage Protection (OVP)
Built in Fixed Valley Current Limit Protection
Built In Thermal Shutdown Function
VPP Converter
Integrated High_Side P-Channel MOSFET 220mΩ
and Low_ Side N-Channe l MOSFET 2 00 mΩ @
VCC=5V
General Description
The APW8871 integrates two synchronous buck PWM
controller and high/low side power MOSFETs to gener-
ate VPP and VDDQ, two sourcing and sinking LDO linear
regulator to generate VTT and VTTREF. It provides a com-
plete power supply for DDR4 memory system. It offers
the lowest total solution cost in system where space is at
a premium.
The APW8871 provides excellent transient response
and accurate DC voltage output in PFM Mode. In Pulse
Frequency Mode (PFM), the APW8871 provides very
high efficiency over light to heavy loads with loading-
modulated switching frequencies.
The APW8871 has maximum power indicator function
in order to prevent over load condition. The device also
has single enable for VPP and VDDQ with JEDEC
sequence implemented. Moreover, the APW8871
integrates SMBus controller to program VDDQ output
voltage, VDDQ DAC voltage adjustment, VDDQ voltage
slew rate setting, and VDDQ PWM converter frequency.
The APW8871 is equipped with accurate current-limit,
output under-voltage, output over-voltage and over-tem-
perature protections. A Power-On- Reset function moni-
tors the voltage on VCC prevents wrong operation during
power on.
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Excellent Reference Voltage = 0.6V
- +1% Load/Line Regulations over all TC range
Fixed 1MHz switching Frequency
Built in Internal Soft-Sta rt: 0.2 ms(typ.) and Soft-
Stop Functions for PWM Output
60% Under-Voltage Protection (UVP)
125% Over-Voltage Protection (OVP)
ANP EC res erves the right to ma ke cha nges to imp rove relia bility or m anufac turab ility witho ut no tice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
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©
ANPEC Electronics C orp.
Rev. A.1 - Sep., 2015
1
www.anpec.com.tw
APW8871
General Description (cont.)
The LDO is designed to provide a regulated voltage with
bi-directional output current for DDR-SDRAM termination.
The device integrates two power transistors to source or
sink current up to 0.75A. It also incorporates current-limit
and thermal shutdown protection.
An internal resistor divider is used to provide a half volt-
age of VDDQ for VTTREF and VTT Voltage. The VTT out-
put voltage is only requiring 10µF of ceramic output ca-
pacitance for stability and fast transient response. The
S3 and S5 pins provide the sleep state for VTT (S3 state)
and suspend state (S4/S5 state) for device, when S5 and
S3 are both pulled low the device provides the soft-off for
VTT and VTTREF.
The APW8871 is available in 4mmx4mm 26-pin Thin QFN
package.
Applications
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DDR3 and DDR4 Memory Power Supplies
NB/MB/Tablet
Simplified Application Circuit
V
CC
=5V
V
IN
+4.5V~25V
VDDQ PWM
Converter
V
PVCC
=3~5.5V
VTT
VDDQ/2
VPP PWM
Converter
VDDQ
L
1
Q1
Q3
L
2
DDR
LDO
VPP
V
CC
Q4
Q2
SMBUS Interface
SMC
S3
S5
SMD
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©
ANPEC Electronics C orp.
Rev. A.1 - Sep., 2015
2
www.anpec.com.tw
APW8871
Absolute Maximum Ratings
(Note 1.2)
Symbol
V
CC,
V
PVCC
V
IN
V
BOOT
V
BOOT-GND
V
LX1
LX2 Voltage (LX2 to GND)
V
LX2
<20ns pulse width
>20ns pulse width
All Other Pins (FB2, S3, S5, VDDQSNS, SMD, SMC, POK,
VLDOIN, VTTSNS, VTT, and VTTREF to AGND Voltage)
PGND to AGND Voltage
T
j
T
STG
T
SDR
Maximum Junction Temperature
Storage Temperature
Maximum Soldering Temperature, 10 Seconds
-5 ~ 9
-0.3 ~ 7
-0.3 ~ 7
-0.3 ~ 0.3
150
-65 ~ 150
260
V
Parameter
VCC /PVCC Supply Voltage (VCC/PVCC to AGND)
VIN Supply Voltage (VIN to AGND)
BOOT Supply Voltage (BOOT to LX1)
BOOT Supply Voltage (BOOT to GND)
LX1 Voltage (LX1 to GND)
<20ns pulse width
>20ns pulse width
-5 ~ 35
-0.3 ~ 28
V
Rating
-0.3 ~ 7
-0.3 ~ 28
-0.3 ~ 7
-0.3 ~ 35
Unit
V
V
V
V
V
V
o
o
C
C
C
o
Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recom-
mended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability
Note 2: The device is ESD sensitive. Handling precautions are recommended.
Thermal Characteristics
(Note 3)
Symbol
θ
JA
θ
JC
Parameter
Thermal Resistance -Junction to Ambient
Thermal Resistance -Junction to Case
Value
40
12
Unit
°C/W
Note3:
θ
JA
and
θ
JC
are measured with the component mounted on a high effective the thermal conductivity test board in free air. The
exposed pad of package is soldered directly on the PCB.
Recommended Operating Conditions
Symbol
V
CC
V
IN
V
PVCC
V
VDDQ
V
VPP
V
VTT
I
VPP
I
VDDQ
I
VTT
L
1
Parameter
VCC Supply Voltage
Converter Input Voltage
PVCC Supply Voltage
VDDQ Output Voltage
VPP Output Voltage
LDO Output Voltage
VPP Output Current
VDDQ Output Current
LDO Output Current
VDDQ Output Inductor
Range
4.5 ~ 5.5
4.5 ~ 25
3 ~ 5.5
1.0 ~ 1.7
0.6 ~ 3.3
0.5 ~ 0.9
0 ~ 0.6
0 ~ 8.5
-0.75 ~ +0.75
0.5 ~ 4.7
Unit
V
V
V
V
V
V
A
A
A
µH
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©
ANPEC Electronics C orp.
Rev. A.1 - Sep., 2015
4
www.anpec.com.tw
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