S1D2502B01
Preliminary
VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS
VIDEO AMP MERGED OSD PROCESSOR
The S1D2502B01 is a very high frequency video amplifier
& wide range OSD processor 1 chip system with I
2
C Bus
control used in monitors. It contains 3 matched R/G/B video
amplifiers with OSD processor and provides flexible
interfacing to I
2
C Bus controlled adjustment systems.
32-DIP-600A
FUNCTIONS
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R/G/B video amplifier
OSD processor
I
2
C bus control
Cut-off brightness control
R/G/B sub contrast/cut-off control
Half tone
ORDERING INFORMATION
Device
S1D2502B01-D0B0
Package
32-DIP-600A
Operating Temperature
-20
°C
— +75
°C
FEATURES
VIDEO AMP PART
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3-channel R/G/B video amplifier, 175MHz @f-3dB
I
2
C bus control items
—
Contrast control: -38dB
—
Sub contrast control for each channel: -12dB
—
Brightness control
—
OSD contrast control: -38dB
—
Cut-off brightness control (AC coupling)
—
Cut-off control for each channel (AC coupling)
—
Switch registers for SBLK and video half tone and
CLP/BLK polarity selection and INT/EXT CLP selection
and generated CLP width control
Built in ABL (automatic beam limitation)
Built in video input clamp, BRT clamp
Built in video half tone (3mode) function on OSD
pictures
Capable of 8.0Vp-p output swing
Improvement of rise & fall time (2.2ns)
Cut-off brightness control
Built in blank gate with spot killer
Clamp pulse generator
OSD intensity
BLK, CLP polarity selection
Clamp gate with anti OSD sagging
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OSD PART
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Built in 1K-byte SRAM
448 ROM fonts (each font consists of 12
×
18
dots.)
Full screen memory architecture
Wide range PLL available (15kHz
—
90kHz,
Reference 800 X 600)
Programmable vertical height of character
Programmable vertical and horizontal
positioning
Character color selection up to 16 different
colors
Programmable background color (up to 16
colors)
Character blinking, bordering and shadowing
Color blinking
Character scrolling
Fade-in and fade-out
Box drawing
Character sizing up to four times
72MHz pixel frequency from on-chip PLL
(Reference 800 X 600)
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Preliminary
VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS
S1D2502B01
Table 1. Pin Configuration
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Symbol
VFLB
VSSA
VCO_IN_P
VREF1
VREF
VDDA
CONT_CAP
ABL
GND3
CLP_IN
VCC3
RIN
VCC1
GIN
GND1
BIN
BCLP
BOUT
GND2
GCLP
GOUT
VCC2
RCLP
ROUT
BCT
GCT
RCT
VSS
SCL
SDA
VDD
HFLB
I/O
I
-
I
O
O
-
-
-
-
-
-
I
-
I
-
I
-
O
-
-
O
-
-
O
-
-
-
-
I
I/O
-
I
Vertical flyback signal
Ground (PLL part)
This voltage is generated at the external loop filter and goes into the
input stage of the VCO.
Charge pump output
PLL regulator filter
+5V supply voltage for PLL part
Contrast control for AMP part
Auto beam limit.
Ground for video AMP part(for AMP control)
Video clamp pulse input
+12V supply voltage for video AMP part(for AMP control)
Video signal input (red)
+12V supply voltage for video AMP(for main video signal process)
Video signal input (green)
Ground for video AMP part(for main video signal process)
Video signal input (blue)
B output clamp cap
Video signal output (blue)
Ground for video AMP part(for video output drive)
G output clamp cap
Video signal output (green)
+12V supply voltage for video AMP part(for video output drive)
R output clamp cap
Video signal output (red)
B cut-off output
G cut-off output
R cut-off output
Ground for digital part
Serial clock (I
2
C)
Serial data (I
2
C)
+5V supply voltage for digital part
Horizontal flyback signal
Configuration
3
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