The information disclosed herein was
originated by and is the property of Densitron
Corporation. Densitron Corporation reserves
all patent, proprietary, design, use, sales,
manufacturing and reproduction rights thereto.
REVISIONS
REV
DESCRIPTION
DATE
APPROVED
A RELEASED ON ECN #E3241
08/31/06
RM
1.
2.
3.
4.
Specification subject to change without notice.
All dimensions and specifications apply to standard modules. This information may vary for modules with optional
features.
All dimensions are in millimeters.
Precautions: These precautions apply equally to modules from all makers, not just Densitron. Violation of these
guidelines may void the warranty and can cause problems ranging from erratic operation to catastrophic display
failure.
Handling precautions:
♦
This device is susceptible to Electro-Static Discharge (ESD) damage. Observe Anti-Static precautions.
Power supply precautions:
♦
Identify and, at all times, observe absolute maximum ratings for both logic and LC drivers. Note that there is some
variance between models.
♦
Prevent the application of reverse polarity to V
DD
and V
SS
, however briefly.
♦
Use a clean power source free from transients. Power up conditions are occasionally “jolting” and may exceed the
maximum ratings of the module.
♦
The +5V power of the module should also supply the power to all devices which may access the display. Don’t allow
the data bus to be driven when the logic supply to the module is turned off.
♦
DO NOT install a capacitor between the V
O
(contrast) pin and ground. V
DD
must, at all times, exceed the V
O
voltage
level. The capacitor combines with the contrast potentiometer to form an R-C network which “holds-up” V
O
, at power-
down, possibly damaging the module.
Operating precautions:
♦
DO NOT plug or unplug the module when the system is powered up.
♦
Minimize the cable length between the module and host MPU. (Recommended max. length 30 cm).
♦
For models with EL or CCFL backlights, do not disable the backlight by interrupting the HV line. Unloaded inverters
produce voltage extremes which may arc within a cable or at the display.
♦
Operate the module within the limits of the modules temperature specifications.
Mechanical / Environmental precautions:
♦
Improper soldering is the major cause of module difficulty. Use of flux cleaner is not recommended as they may seep
under the elastomeric connection and cause display failure. Densitron recommends the use of Kester “245” no-clean
solder.
♦
Mount the module so that it is free from torque and mechanical stress.
♦
Surface of LCD panel should not be touched or scratched. The display front surface is an easily scratched, plastic
polarizer. Avoid contact and clean only when necessary with soft, absorbent cotton dampened with petroleum
benzene.
♦
ALWAYS employ anti-static procedure while handling the module.
♦
Prevent moisture build-up upon the module and observe the environmental constraints for storage temperature and
humidity.
♦
DO NOT store in direct sunlight.
♦
If leakage of the liquid crystal material should occur, avoid contact with this material, particularly ingestion. If the body
or clothing becomes contaminated by the liquid crystal material, wash thoroughly with water and soap.
Notes:
(unless otherwise specified)
Unless otherwise
specified:
Dimensions are mm
Tolerances are:
X=
±
3
.X =
±
0.5
.XX =
±
0.05
FSCM NO. 62483
APPROVALS
Digitally signed by Robert J. Mendoza
DN: CN = Robert J. Mendoza, C = US, O = Densitron
Corporation, OU = DCA
Reason: I am the author of this document
Location: Santa Fe Springs, CA.
Date: 2006.08.31 09:24:55 -07'00'
DENSITRON CORPORATION
TITLE
Kaiwen
Cheng
Digitally signed by Kaiwen Cheng
DN: CN = Kaiwen Cheng, C = US,
O = Densitron Corporation America
Reason: I am approving this
document
Date: 2006.08.31 10:07:52 -07'00'
64 X 240 GRAPHICS LCD MODULE
DWG. NO.
LMR3267
SHEET
1
OF
8
1.0
DESCRIPTION
Dot matrix display module consisting of liquid Crystal Display, CMOS driver and Toshiba T6963C controller
LSI, printed circuit board, metal support frame.
Available LC fluid types are: NTN (supertwisted nematic) and NTN-H (extended temperature range NTN).
Other options includes (EL) backlighting, on-board negative voltage generation circuitry.
2.0
MECHANICAL CHARACTERISTICS
Specifications
Item
Package Dimensions
Display format
Driving method
Dot size
Dot pitch
Active display area
Viewing area
ROHS Compliant
Notes:W-Width;H-Height;D-Depth.
180.0 (W) x 65.0 (H) x 12.1 max (D)
240 dots (W) x 64 dots (H)
1/64
0.49 (W) x 0.49 (H)
0.53 (W) x 0.53 (H)
127.16 (W) x 33.88 (H)
132.0 (W) x 39.0 (H)
Yes
Unit
mm
-
duty
mm
mm
mm
mm
3.0
ABSOLUTE MAXIMUM RATINGS
Item
Symbol
V
DD
-
V
SS
V
DD
-
V
EE
T
OP
T
ST
Min.
0
0
0
-20
-
-
NTN
Max.
7
Min.
0
0
-20
-30
-
-
NTN-H
Max.
7
V
SS
=0V;T
a
=25°C
Unit
V
V
°C
RH (Note 2)
RH (Note 2)
Logic supply voltage
LC driver supply voltage
Operating temperature
Storage temperature (Note 1)
Humidity: Operating (@40°C)
Non-operating (@40°C)
23
+50
+70
85%
95%
23
+70 (Note 3)
+80
85%
95%
-
-
Notes:
1: Tested to 100 hrs.
2: Refers to non-condensing conditions.
3. It is not recommended to operate EL lamp above +50°C
4.0
ELECTRICAL CHARACTERISTICS
Item
Symbol
Input “High” voltage
Input “Low” voltage
Output “High” voltage
Output “Low” voltage
Power supply current
Power supply current
V
IH
V
IL
V
OH
V
OL
I
EE
I
DD
Test Condition
-
-
Min.
Typ.
V
DD
=5±0.25V;T
a
=25°C
Max.
Unit
I
OH
=0.205mA
I
OL
=1.2mA
V
EE
=-20V
V
DD
=5.0V
0.8
V
SS
2.2
-
-
-
-
-
-
-
1
9
V
DD
0.2V
DD
-
0.8
-
-
V
V
V
V
mA
mA
DWG. NO.
LMR3267
REV.
SHEET
2
OF
8
A
8.0
INTERFACE DESCRIPTION
Symbol
FG
V
SS
V
DD
V
O
WR
RD
CE
C/D
V
EE
RESET
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
FS
N/C
V
EL
V
EL
Font Selection
Font Selection
FS
I/O
-
-
-
-
I
I
I
I
I(O)
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
-
-
-
Function
Frame Ground
Ground (0V)
Logic Supply Voltage (+5V)
LC drive voltage for contrast adjustment
Data write Active Low
Data read Active Low
Chip enable Active Low
WR="L"…C/D="H" : Command write C/D="L": Data write
RD="L"…C/D="H" : Status read
C/D="L": Data read
Negative voltage input for LC drive (Negative voltage output for
models with on-board negative voltage generator)
Chip reset Active Low
Bi-directional data bus line 0
Bi-directional data bus line 1
Bi-directional data bus line 2
Bi-directional data bus line 3
Bi-directional data bus line 4
Bi-directional data bus line 5
Bi-directional data bus line 6
Bi-directional data bus line 7
Terminals for selection of font size
No connection
EL backlight input voltage (from output to DC-AC inverter)
EL backlight input voltage (form output to DC-AC inverter)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
BL1
BL2
8.2
H
5x8
L
7x8
9.0
BLOCK DIAGRAM:
RESET
CE
WR
RD
C/D
MD2
FS1
DB0~DB7
V
O
V
DD
V
EE
V
SS
BL1
BL2
8
T
6
9
6
3
C
5
COM
64
LCD PANEL
13
8
8K
RAM
80
COL
80
COL
4
80
COL
4
DRIVE VOLTAGE
CIRCUIT
TO
LSI
4
4
BACKLIGHT
DWG. NO.
LMR3267
REV.
SHEET
4
OF
8
A
Analog electronics
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