PDTC114E series
NPN resistor-equipped transistors;
R1 = 10 k, R2 = 10 k
Rev. 12 — 21 December 2011
Product data sheet
1. Product profile
1.1 General description
NPN Resistor-Equipped Transistor (RET) family in small Surface-Mounted Device (SMD)
plastic packages.
Table 1.
Product overview
Package
NXP
PDTC114EE
PDTC114EM
PDTC114ET
PDTC114EU
SOT416
SOT883
SOT23
SOT323
JEITA
SC-75
SC-101
-
SC-70
JEDEC
-
-
-
PNP
complement
PDTA114EE
PDTA114EM
PDTA114EU
Package
configuration
ultra small
leadless ultra small
small
very small
Type number
TO-236AB PDTA114ET
1.2 Features and benefits
100 mA output current capability
Built-in bias resistors
Simplifies circuit design
Reduces component count
Reduces pick and place costs
AEC-Q101 qualified
1.3 Applications
Digital application in automotive and
industrial segments
Control of IC inputs
Cost-saving alternative for BC847/857
series in digital applications
Switching loads
1.4 Quick reference data
Table 2.
Symbol
V
CEO
I
O
R1
R2/R1
Quick reference data
Parameter
collector-emitter voltage
output current
bias resistor 1 (input)
bias resistor ratio
Conditions
open base
Min
-
-
7
0.8
Typ
-
-
10
1.0
Max
50
100
13
1.2
Unit
V
mA
k
NXP Semiconductors
PDTC114E series
NPN resistor-equipped transistors; R1 = 10 k, R2 = 10 k
2. Pinning information
Table 3.
Pin
1
2
3
Pinning
Description
input (base)
GND (emitter)
output (collector)
1
2
006aaa144
sym007
Simplified outline
Graphic symbol
SOT23; SOT323; SOT416
3
R1
3
1
R2
2
SOT883
1
2
3
input (base)
GND (emitter)
output (collector)
1
3
2
Transparent
top view
1
R2
R1
3
2
sym007
3. Ordering information
Table 4.
Ordering information
Package
Name
PDTC114EE
PDTC114EM
PDTC114ET
PDTC114EU
SC-75
SC-101
-
SC-70
Description
plastic surface-mounted package; 3 leads
Version
SOT416
Type number
leadless ultra small plastic package; 3 solder lands; SOT883
body 1.0
0.6
0.5 mm
plastic surface-mounted package; 3 leads
plastic surface-mounted package; 3 leads
SOT23
SOT323
4. Marking
Table 5.
Marking codes
Marking code
[1]
09
DS
*16
*09
Type number
PDTC114EE
PDTC114EM
PDTC114ET
PDTC114EU
[1]
* = placeholder for manufacturing site code.
PDTC114E_SER
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 12 — 21 December 2011
2 of 17
NXP Semiconductors
PDTC114E series
NPN resistor-equipped transistors; R1 = 10 k, R2 = 10 k
5. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CBO
V
CEO
V
EBO
V
I
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
positive
negative
I
O
I
CM
P
tot
output current
peak collector current
total power dissipation
PDTC114EE (SOT416)
PDTC114EM (SOT883)
PDTC114ET (SOT23)
PDTC114EU (SOT323)
T
j
T
amb
T
stg
[1]
[2]
[3]
Conditions
open emitter
open base
open collector
Min
-
-
-
-
-
-
Max
50
50
10
+40
10
100
100
150
250
250
200
150
+150
+150
Unit
V
V
V
V
V
mA
mA
mW
mW
mW
mW
C
C
C
single pulse; t
p
1 ms
T
amb
25
C
[1][2]
[2][3]
[1]
[1]
-
-
-
-
-
-
65
65
junction temperature
ambient temperature
storage temperature
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
Reflow soldering is the only recommended soldering method.
Device mounted on an FR4 PCB with 70
m
copper strip line, standard footprint.
PDTC114E_SER
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 12 — 21 December 2011
3 of 17
NXP Semiconductors
PDTC114E series
NPN resistor-equipped transistors; R1 = 10 k, R2 = 10 k
300
P
tot
(mW)
200
(3)
(1)
006aac778
(2)
100
0
-75
-25
25
75
125
175
T
amb
(°C)
(1) SOT23; FR4 PCB, standard footprint
SOT883; FR4 PCB with 70
m
copper strip line, standard footprint
(2) SOT323; FR4 PCB, standard footprint
(3) SOT416; FR4 PCB, standard footprint
Fig 1.
Power derating curves
6. Thermal characteristics
Table 7.
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from junction
to ambient
PDTC114EE (SOT416)
PDTC114EM (SOT883)
PDTC114ET (SOT23)
PDTC114EU (SOT323)
[1]
[2]
[3]
Conditions
in free air
[1][2]
[2][3]
[1]
[1]
Min
Typ
Max
Unit
-
-
-
-
-
-
-
-
830
500
500
625
K/W
K/W
K/W
K/W
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Reflow soldering is the only recommended soldering method.
Device mounted on an FR4 PCB with 70
m
copper strip line, standard footprint.
PDTC114E_SER
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 12 — 21 December 2011
4 of 17
NXP Semiconductors
PDTC114E series
NPN resistor-equipped transistors; R1 = 10 k, R2 = 10 k
10
3
duty cycle = 1
Z
th(j-a)
(K/W)
10
2
0.1
0.05
0.02
10
0
0.01
0.75
0.5
0.33
0.2
006aac781
1
10
-5
10
-4
10
-3
10
-2
10
-1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, standard footprint
Fig 2.
Transient thermal impedance from junction to ambient as a function of pulse duration for
PDTC114EE (SOT416); typical values
006aac782
10
3
Z
th(j-a)
(K/W)
10
2
duty cycle = 1
0.75
0.5
0.33
0.2
0.1
0.05
10
0.02
0.01
0
1
10
-5
10
-4
10
-3
10
-2
10
-1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, 70
m
copper strip line
Fig 3.
Transient thermal impedance from junction to ambient as a function of pulse duration for
PDTC114EM (SOT883); typical values
PDTC114E_SER
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 12 — 21 December 2011
5 of 17
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