SIT2025BE-S2-18N-123.021999D datasheet, PDF

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SIT2025BE-S2-18N-123.021999D: DescriptionLVCMOS Output Clock Oscillator,; CategoryPassive components oscillator; File Size436KB，15 Pages; ManufacturerSiTime; Environmental Compliance

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SIT2025BE-S2-18N-123.021999D Overview

LVCMOS Output Clock Oscillator,

SIT2025BE-S2-18N-123.021999D Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	7142212551
Reach Compliance Code	compliant
Other features	AEC-Q100; ALSO COMPATIBLE WITH LVTTL OUTPUT; TR
maximum descent time	2.5 ns
Frequency Adjustment - Mechanical	NO
frequency stability	25%
JESD-609 code	e4
Installation features	SURFACE MOUNT
Nominal operating frequency	123.021999 MHz
Maximum operating temperature	105 °C
Minimum operating temperature	-40 °C
Oscillator type	LVCMOS
Output load	15 pF
physical size	3.05mm x 1.75mm x 1.45mm
longest rise time	2.5 ns
Filter level	AEC-Q100
Maximum supply voltage	1.98 V
Minimum supply voltage	1.62 V
Nominal supply voltage	1.8 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)

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SiT2025B

High Frequency, Automotive AEC-Q100 SOT23 Oscillator

Features



Applications



AEC-Q100 with extended temperature range (-55°C to 125°C)

Frequencies between 115.2 MHz and 137 MHz accurate to 6

decimal points

100% pin-to-pin drop-in replacement to quartz-based XO

Excellent total frequency stability as low as ±20 ppm

Industry best G-sensitivity of 0.1 PPB/G

LVCMOS/LVTTL compatible output

5-pin SOT23-5 package: 2.9 x 2.8 mm x mm

RoHS and REACH compliant, Pb-free, Halogen-free and

Antimony-free



Automotive, extreme temperature and other high-rel

electronics

Infotainment systems, collision detection devices, and

in-vehicle networking

Powertrain control

Electrical Characteristics

All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise

stated. Typical values are at 25°C and nominal supply voltage.

Table 1. Electrical Characteristics

Parameters

Output Frequency Range

Frequency Stability

Symbol

F_stab

Min.

115.20

-20

-25

-30

-50

Operating Temperature

Range (ambient)v

T_use

-40

-55

Supply Voltage

Current Consumption

Vdd

Idd

1.62

2.25

–

Output High Voltage

VOH

90%

Typ.

–

1.8

–

4.9

–

1.5

–

Max.

137

Unit

MHz

Condition

Refer to

Table 14 and Table 15

for the exact list of supported frequencies

Frequency Range

Frequency Stability and Aging

Inclusive of Initial tolerance at 25°C, 1st year aging at 25°C, and varia-

+20

ppm

tions over operating temperature, rated power supply voltage and load

+25

ppm

(15 pF ± 10%).

+30

ppm

+50

Operating Temperature Range

+85

+105

+125

1.98

3.63

°C

Industrial, AEC-Q100 Grade 3

Extended Industrial, AEC-Q100 Grade 2

Automotive, AEC-Q100 Grade 1

Extended Temperature, AEC-Q100

All voltages between 2.25V and 3.63V including 2.5V, 2.8V, 3.0V and 3.3V

are supported. Contact

SiTime

for 1.5V support

Supply Voltage and Current Consumption

No load condition, f = 125 MHz, Vdd = 2.25V to 3.63V

No load condition, f = 125 MHz, Vdd = 1.62V to 1.98V

LVCMOS Output Characteristics

2.5

–

Vdd

Vdd = 2.25V - 3.63V, 20% - 80%

Vdd = 1.8V, 20% - 80%

IOH = -4 mA (Vdd = 3.0V or 3.3V)

IOH = -3 mA (Vdd = 2.8V and Vdd = 2.5V) IOH = -2

mA (Vdd = 1.8V)

IOL = 4 mA (Vdd = 3.0V or 3.3V)

IOL = 3 mA (Vdd = 2.8V and Vdd = 2.5V) IOL = 2

mA (Vdd = 1.8V)

Pin 1, OE

Pin 1, OE logic high or logic low

Measured from the time Vdd reaches its rated minimum value

f = 115.20 MHz. For other frequencies, T_oe = 100 ns + 3 * cycles

f = 125 MHz, 2.25V to 3.63V

f = 125 MHz, 1.8V

f = 125 MHz, Integration bandwidth = 900 kHz to 7.5 MHz

f = 125 MHz, Integration bandwidth = 12 kHz to 20 MHz

Duty Cycle

Rise/Fall Time

Tr, Tf

Output Low Voltage

VOL

–

10%

Vdd

Input Characteristics

Input High Voltage

Input Low Voltage

Input Pull-up Impedence

Startup Time

Enable/Disable Time

RMS Period Jitter

RMS Phase Jitter (random)

VIH

VIL

Z_in

T_start

T_oe

T_jitt

T_phj

70%

–

100

–

1.6

1.8

0.7

1.5

–

30%

–

130

2.5

–

Vdd

kΩ

Jitter

Startup and Resume Timing

Rev 1.5

December 14, 2016

www.sitime.com

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