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TN2106N3-G

Description
mosfet 60v 2.5ohm
CategoryDiscrete semiconductor    The transistor   
File Size534KB,6 Pages
ManufacturerSupertex
Environmental Compliance
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TN2106N3-G Overview

mosfet 60v 2.5ohm

TN2106N3-G Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSupertex
Parts packaging codeTO-92
package instructionCYLINDRICAL, O-PBCY-T3
Contacts3
Reach Compliance Codecompli
ECCN codeEAR99
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage100 V
Maximum drain current (Abs) (ID)0.3 A
Maximum drain current (ID)1.2 A
Maximum drain-source on-resistance0.35 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
Maximum feedback capacitance (Crss)65 pF
JEDEC-95 codeTO-92
JESD-30 codeO-PBCY-T3
JESD-609 codee3
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Minimum operating temperature-55 °C
Package body materialPLASTIC/EPOXY
Package shapeROUND
Package formCYLINDRICAL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)0.74 W
Certification statusNot Qualified
surface mountNO
Terminal surfaceMatte Tin (Sn)
Terminal formTHROUGH-HOLE
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
TN2106
N-Channel Enhancement-Mode
Vertical DMOS FET
Features
Free from secondary breakdown
Low power drive requirement
Ease of paralleling
Low C
ISS
and fast switching speeds
Excellent thermal stability
Integral source-drain diode
High input impedance and high gain
Complementary N- and P-channel devices
General Description
This low threshold, enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven, silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures, this
device is free from thermal runaway and thermally-induced
secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
very low threshold voltage, high breakdown voltage, high
input impedance, low input capacitance, and fast switching
speeds are desired.
Applications
Logic level interfaces - ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo-voltaic drives
Analog switches
General purpose line drivers
Telecom switches
Ordering Information
Device
TN2106
Package Option
TO-236AB (SOT-23)
TN2106K1-G
TO-92
TN2106N3-G
BV
DSS
/BV
DGS
(V)
R
DS(ON)
(max)
(Ω)
V
GS(th)
(max)
(V)
60
2.5
2.0
-G indicates package is RoHS compliant (‘Green’)
Pin Configurations
DRAIN
SOURCE
SOURCE
DRAIN
GATE
Absolute Maximum Ratings
Parameter
Drain-to-source
Drain-to-gate
Gate-to-source
Operating and storage temperature
Soldering temperature*
Value
BV
DSS
BV
DGS
±20V
-55
O
C to +150
O
C
300
O
C
GATE
TO-236AB (SOT-23) (K1)
TO-92 (N3)
Product Marking
N1LW
W = Code for week sealed
= “Green” Packaging
TO-236AB (SOT-23) (K1)
TN
2 1 0 6
YYWW
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
*
Distance of 1.6mm from case for 10 seconds.
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
TO-92 (N3)
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com

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