XRT8010
312MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS
NOVEMBER 2003
REV. 1.0.2
s
DESCRIPTION
The XRT8010 is a monolithic analog phase locked
loop that provides a high frequency LVDS clock
output, using a low frequency crystal or reference
clock. It is designed for SONET/SDH and other low
jitter applications.The high performance of the IC
provides a very low jitter LVDS clock output up to 320
MHz, while operating at 3.3 volts. The XRT8010 has
a selectable 8x or 16x internal multiplier for an
external crystal or signal source. The Output Enable
pin provides a true disconnect for the LVDS output.
The very compact (4 x 4 mm) low inductance
package is ideal for high frequency operation.
Telecommunications Sytems
FEATURES
•
156 or 320 MHz Operating Range
•
Low Output Jitter:
s
0.0009 UI
RMS
typical @ 155.52 MHz, per
Telcordia GR-253-CORE for OC-3.
Optimized for 15 to 40 MHz crystals
Uses parallel fundamental mode
•
On Chip Crystal Oscillator Circuit
s
s
APPLICATIONS
•
Selectable 8x or 16x multiplier
•
Selectable ÷1 or ÷2 LVDS output
•
LVDS output meets TIA/EIA 644A Specification
(2001)
•
Gigabit Ethernet
•
SONET/SDH
•
SPI-4 Phase 2
•
8x or 16x Clock Multiplier for
s
Computer
•
3.3V Low power CMOS: <80 mW typical
•
-40°C to +85°C operating temperature
•
Extremely small 16-lead QFN package
F
IGURE
1. XRT8010 B
LOCK
D
IAGRAM
15-40 M H z
C rys tal
X T A L1
12 - 20 pF
+3.3V
A V
DD
A V
DD
R
EXT
10k
Ω
O V
DD
X TA L2
1 2 - 2 0 pF
X R T 801 0
V oltage R eferenc e
&
B ias G enerator
O sc illator
C ircuit &
Input B uffer
VCO
C alibration Logic
P has e
D etec tor
C harge
P um p
Loop
Filter
S electable
VCO
÷
1 or
÷
2
D iv ider
O U TP
LV D S O utput
O U TN
F eedbac k D iv ider
÷
8 or 16
AGND
(C ry stal)
AG ND
AG ND
FS 1
FS 0
PD
OE
O
GND
Exar
Corporation 48720 Kato Road, Fremont CA, 94538
•
(510) 668-7000
•
FAX (510) 668-7017
•
www.exar.com
XRT8010
312MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS
REV. 1.0.2
F
IGURE
2. P
IN
-O
UT OF THE
XRT8010 (T
OP
V
IEW
)
16
15
14
13
1
2
12
11
XRT8010
3
4
10
9
5
6
7
ORDERING INFORMATION
P
ART
N
UMBER
XRT8010IL
P
ACKAGE
T
YPE
16 LEAD QUAD FLAT NO LEAD
(4 mm x 4 mm, QFN)
O
PERATING
T
EMPERATURE
R
ANGE
-40°C to +85°C
2
8
XRT8010
312MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS
REV. 1.0.2
TABLE OF CONTENTS
DESCRIPTION....................................................................................................................1
APPLICATIONS ...........................................................................................................................................1
FEATURES ..................................................................................................................................................1
F
IGURE
1. XRT8010 B
LOCK
D
IAGRAM
............................................................................................................................................. 1
F
IGURE
2. P
IN
-O
UT OF THE
XRT8010 (T
OP
V
IEW
) ........................................................................................................................... 2
O
RDERING
I
NFORMATION
...................................................................................................................... 2
T
ABLE OF
C
ONTENTS
............................................................................................................I
ABSOLUTE MAXIMUM RATINGS
.........................................................................................................................3
ELECTRICAL CHARACTERISTICS
.......................................................................................................................3
T
ABLE
1: C
ATEGORY
II I
NTRINSIC
J
ITTER
P
ER
T
ELCORDIA
GR-253-CORE (
AT
155MH
Z
) .................................................................. 4
F
IGURE
3. LVDS O
UTPUT
W
AVEFORMS AND
T
EST
C
IRCUITS
............................................................................................................ 5
T
ABLE
2: F
REQUENCY
S
ELECTION
T
ABLE
......................................................................................................................................... 5
1.0 CALIBRATION .......................................................................................................................................6
2.0 CRYSTAL SELECTION .........................................................................................................................6
3.0 DATA AND PLOTS ................................................................................................................................6
T
ABLE
3: P
OWER
-
DOWN AND
O
UTPUT TRI
-
STATE SELECTION TABLE
................................................................................................... 6
F
IGURE
4. I
NTRINSIC
J
ITTER
C
ONNECTION
D
IAGRAM
......................................................................................................................... 7
F
IGURE
5. S
IMPLIFIED
B
LOCK
D
IAGRAM OF THE
XRT8010
AND
PECL R
ECEIVER
.............................................................................. 7
F
IGURE
6. LVDS O
UTPUT
@160 MH
Z
............................................................................................................................................. 8
F
IGURE
7. LVDS O
UTPUT
@ 320 MH
Z
............................................................................................................................................ 9
F
IGURE
8. XRT8010 P
HASE
N
OISE FOR
20 MH
Z
R
EFERENCE
C
RYSTAL
......................................................................................... 10
ORDERING INFORMATION.............................................................................................11
R
EVISIONS
...................................................................................................................................................12
I
XRT8010
312MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS
PIN DESCRIPTION
P
IN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
N
AME
AVDD
AGND
XTAL1
XTAL2
AGND
REXT
OE
PD
FS1
FS0
AGND
OGND
OUTN
OUTP
OVDD
AVDD
O
O
I
I
I
I
I
I
O
T
YPE
D
ESCRIPTION
3.3V ±10% Analog Supply for Crystal Oscillator
Analog Ground for Crystal Oscillator
Crystal pin 1 or external clock input
Crystal pin 2 (output drive for crystal)
Analog Ground
External Bias Resistor (10KΩ to ground)
Output Enable, Active low (Internal
50K
Ω
pull-down to ground)
Power Down, Active High
(Internal 50K
Ω
pull-down to ground)
Frequency select "1"
(Internal 50K
Ω
pull-down to ground)
Frequency select "0"
(Internal 50K
Ω
pull-up to VDD)
Analog Ground
Output Ground for LVDS outputs
LVDS negative output for 50Ω line
LVDS positive output for 50Ω line
3.3V ±10% Digital Supply for LVDS Output buffer
3.3V ±10% Analog Supply
REV. 1.0.2
ABSOLUTE MAXIMUM RATINGS
Supply voltage
VIN
Storage Temperature
Operating Temperature
ESD
-0.5 to 6.0 V
-0.5 to 6.0 V
-65°C to + 150°C
-40°C to + 85°C
2,000 volts
ELECTRICAL CHARACTERISTICS
P
ARAMETER
Supply Voltage
Supply current
Input Digital High
Input Digital Low
Crystal Frequency
Crystal Frequency
S
YMBOL
VDD
IDD
VINH
VINL
15
27
2.0
0.8
27
40
M
IN
3.0
T
YP
3.3
20
M
AX
3.6
25
U
NIT
V
mA
V
V
MHz
MHz
See Section 2,0 for Crystal Selection
See Section 2,0 for Crystal Selection
C
ONDITIONS
3
XRT8010
REV. 1.0.2
312MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS
S
YMBOL
M
IN
T
YP
M
AX
5
U
NIT
ms
C
ONDITIONS
After VDD reaches 2.8V
P
ARAMETER
Power on Calibration time
N
OTE
:
Calibration time = 16,000 clock
cycles
Max Frequency Out
Max Frequency Out
Rise time
Fall Time
Duty cycle
Differential Output Skew
Output Loading
Output voltage Swing
Common Mode Voltage
Output short circuit current
Cycle-to-Cycle Jitter
Cycle-to-Cycle Jitter
Intinsic Jitter
Intinsic Jitter
Spectral Density of Phase
Noise
L
(f)
VCM
250
1.2
-5.7
3
3
16
16
-8
100
450
FOUT
FOUT
TR
TF
45
140
285
170
340
300
300
55
10
MHz
MHz
ps
ps
%
ps
Ω
mV
V
mA
ps
ps
ps
ps
Current limit to ground, VDD or Vp to Vn
rms, at 156 MHz, Input referred
rms, at 312 MHz, Input referred
rms, over 1,000 cycles, at 156 MHz
rms, over 1,000 cycles, at 312 MHz
Differential (OUTP-OUTN)
156 MHz nominal FOUT (see Table 1)
312 MHz nominal FOUT (see Table 1)
CL = 5pF, RL = 100Ω
(20% − 80%)
CL = 5pF, RL = 100Ω
(20% − 80%)
LVDS output
See Figure 3
P
ARAMETER
Single Side Band Phase Noise
L
(f)
C
OVERSION
320MHz @ 100Hz Offset
320MHz @ 1kHz Offset
320MHz @ 10kHz Offset
320MHz @ 100kHz Offset
320MHz @ 1MHz Offset
320MHz @ 10MHz Offset
T
YPICAL
-77.75 dbc/Hz
-100.69 dbc/Hz
-95.38 dbc/Hz
-99.40 dbc/Hz
-105.05 dbc/Hz
-119.03 dbc/Hz
T
ABLE
1: C
ATEGORY
II I
NTRINSIC
J
ITTER
P
ER
T
ELCORDIA
GR-253-CORE (
AT
155MH
Z
)
J
ITTER
B
ANDWIDTH
12kHz - 1.3MHz
12kHz - 5MHz
12kHz - 20MHz
J
ITTER
(RMS)
5.74
7.89
8.99
J
ITTER
(UI
RMS
)
0.0009
0.0012
0.0014
4
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