Real time clock module
I
2
C-BUS COMPATIBLE REAL TIME CLOCK MODULE
• Builtin crystal unit. Adjustment free with 10pF external capacitor.
• Small package (SOP 14-pin).
• Three mode operations: internal crystal oscillation, external 50 Hz
clock and event counter.
• I C-Bus inter face compatible.
• Builtin 240 x 8 bit S-RAM available (RTC8583).
• Alarm and timer functions available.
• Wide operating voltage range 2.5V to 6.0V.
• Wide data hold voltage range 1.0V to 6.0V.
• Low current consumption (RTC8593, 1.0µA typical).
2
RTC-8583/8593 series
Actual size
Specifications (characteristics)
Absolute Max. rating
Item
Supply voltage
Input voltage
Input current
Output current
Symbol
V
DD
V
IN
Ii
Io
T
STG
-55
Condition
V
DD
-GND
Min.
-0.8
Max.
+7.0
V
DD
+0.8
10
+125
V
Unit
The I
2
C-Bus is a trademark of Philips Electronics N.V.
Terminal connection
RTC-8583/8593
14 13 12 11 10 9
8
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
8583
GND1
SCL
SDA
N.C
GND
N.C
A0
OSC1
N.C
N.C
V
DD
N.C
N.C
INT
8593 8593SB
N.C
N.C
SCL
N.C
SDA
N.C
N.C
N.C
GND
N.C
N.C
N.C
RESET N.C
OSC1 RESET
N.C
GND
N.C
SDA
V
DD
SCL
N.C
INT
N.C
V
DD
OSC1
INT
N.C
N.C
N.C
N.C
mA
˚C
Storage temperature
Operating range
Item
Operating voltage
Data holding voltage
Symbol
V
DD
V
CLK
T
OPR
C
G
Condition
Min.
2.5
1.0
-30
10±5%
6.0
+70
V
˚C
pF
Max.
Unit
1
2 3
4 5
6
7
RTC-8593SB
18 17 16 15 14 13 12 11 10
Operating temperature
External capacitor
Frequency characteristics
Item
Frequency tolerance
Frequency temperature
characteristics
Frequency voltage
characteristics
Oscillation
start-up time
Symbol
∆f/fo
T
op
fv
t
OSC
fa
Condition
Ta=25˚C, V
DD
=5V
Ta=-10 to 70˚C, V
DD
=5V
Max.
A: 5±20
B: 5±50
+10
-120
Unit
ppm
1
2 3
4 5
6
7
8
9
Ta=25˚C, V
DD
=2.0 to 6.0V
Ta=25˚C, V
DD
=5V
Ta=25˚C, V
DD
=5V
±3
3
±5
s
ppm/year
External dimensions
RTC-8583/8593
(SOP 14-pin)
(Unit: mm)
Aging
first year
DC characteristics
Item
“H” input voltage
“L” input voltage
“L” output current
Input leak current
A
O
______
Leak current
Output current
Leak current
I
L
SDA
Symbol
V
IH
V
IL
I
OL
Condition
—
Min. Typ. Max.
Unit
0.3
V
mA
1
µA
nA
mA
10.1±0.2
3.1
3.2±0.1
0˚ to
10˚
0.6
-0.8
V
OL
=0.4V
3
RESET
OSC1
V
IN
=V
DD
or GND
250
5.0
0.7V
DD
V
DD
+0.8
R8593 B
E 607 6A
7.4±0.2
___
___
INT
INT
0.05 min.
I
OL
I
L
I
DD0
I
DD1
I
DD2
I
DD3
I
DD1
I
DD2
I
DD3
V
OL
=0.4V
V
IN
=V
DD
or GND
f
SCL
=100 kHz
V
DD
=5V, f
SCL
=0 Hz
V
DD
=3V, f
SCL
=0 Hz
V
DD
=2V, f
SCL
=0 Hz
V
DD
=5V, f
SCL
=0 Hz
V
DD
=3V, f
SCL
=0 Hz
V
DD
=2V, f
SCL
=0 Hz
1
1
0.15
RTC-8593SB
(SOP 18-pin)
200
10
3.5
2.0
3.0
1.2
1.0
50
15
10
15
10
8
µA
11.4±0.2
2.0 max.
1.8
0˚ to
10˚
0.6
SCL
1
E
607 6A
8583
2
Current
Consumption
(non access)
3
1
8593
2
3
5.4
Source current (access)
7.8±0.2
R8593 B
0.05 min.
0.15
59
Real time clock module
Register table
Address
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10 to FF
Register name
CNT
1/100SEC
SEC
MIN
HOUR
DAY
MONTH
TIMER
ALARM
A-1/100
A-SEC
A-MIN
A-HR
A-DAY
A-MON
A-TIM
0 to 99
0 to 59
0 to 59
0 to 23
0 to 31
0 to 12
0 to 99
0 to FF
10A-TIM8
0 to 99
0 to 59
0 to 59
0 to 23
0 to 31
0 to 12
0 to 99
count
bit 7
STOP
8/10
10S8
10MIN8
12/24
YEAR2
W4
10TIMER8
AIE
A-8/10
10A-SEC8
10A-MIN8
A-12/24
—
—
10A-TIM4
10A-TIM2
bit 6
HOLD
4/10
10S4
10MIN4
AM/PM
YEAR1
W2
10TIMER4
TAIE
A-4/10
10A-SEC4
10A-MIN4
A-AM/PM
bit 5
MODE1
2/10
10S2
10MIN2
10HOUR2
10DAY2
W1
10TIMER2
AS1
A-2/10
10A-SEC2
10A-MIN2
10A-HR2
A-DAY2
bit 4
MODE2
1/10
10S1
10MIN1
10HOUR1
10DAY1
10MONTH1
10TIMER1
AS0
A-1/10
10A-SEC1
10A-MIN1
10A-HR1
A-DAY1
10A-MON1
10A-TIM1
bit 3
MASK
8/100
S8
MIN8
HOUR8
DAY8
MONTH8
TIMER8
TIE
A-8/100
10A-SEC8
10A-MIN8
A-HR8
A-DAY8
10A-MON8
A-TIM8
bit 2
ALM
4/100
S4
MIN4
HOUR4
DAY4
MONTH4
TIMER4
TCP2
A-4/100
10A-SEC4
10A-MIN4
A-HR4
A-DAY4
10A-MON4
A-TIM4
bit 1
AF
2/100
S2
MIN2
HOUR2
DAY2
MONTH2
TIMER2
TCP1
A-2/100
10A-SEC2
10A-MIN2
A-HR2
A-DAY2
10A-MON2
A-TIM2
bit 0
TF
1/100
S1
MIN1
HOUR1
DAY1
MONTH1
TIMER1
TCP0
A-1/100
10A-SEC1
10A-MIN1
A-HR1
A-DAY1
10A-MON1
A-TIM1
User's RAM (RTC-8583 is available)
Switching characteristics
Item
SCL clock frequency
Spike tolerance on bus
Bus free time
Start condition set-up time
Hold time
SCL “L” time
SCL “H” time
SCL, SDA rise time
SCL, SDA fall time
Date set-up time
Date hold time
SCL low to data out valid
Stop condition set-up time
Event counter frequency
Symbol
f
SCL
t
SW
t
BUF
t
SU
; STA
t
HD
; STA
t
LOW
t
HIGH
t
TLH
t
THL
t
SU
; DAT
t
HD
; DAT
t
VD
; DAT
t
SU
; STO
fi
250
—
0
—
4.0
—
3.4
µs
—
1.0
MHz
ns
4.0
4.7
4.0
1.0
—
0.3
—
µs
4.7
Min.
—
Max.
100
Unit
KHz
ns
Timing chart
Start
Condition (s)
t
SU
: STA
SCL
t
SUF
SDA
t
TLH
t
THL
Bit 7
MSB (A7)
t
LOW
t
HIGH
Bits
(A6)
1/f
SCL
Protocol
t
HD
: STA
t
SU
: DAT
t
HD
: DAT
Protocol
BITO
LSB (R/W)
ACK
(A)
STOP
Condition (p)
SCL
SDA
t
VD
: DAT
t
SU
: STO
Block diagram
RTC-8583
32.768 KHz
OSC1
Cg=10pF
RTC-8593 Series
32.768 KHz
OSC1
OSC
Divider
Cg=10pF
OSC
Divider
INT
V
DD
GND1.2
Power-ON
RESET
Control
Logic
Register
&
Counter
INT
V
DD
GND
RESET
RESET
Control
Logic
Register
&
Counter
AO
SCL
SDA
I C-BUS
Interface
2
Address
Register
RAM
(8 x 240)
SCL
SDA
I C-BUS
Interface
2
Address
Register
60
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