LPC11Cx2/Cx4
32-bit ARM Cortex-M0 microcontroller; 16/32 kB flash, 8 kB
SRAM; C_CAN
Rev. 3.1 — 15 May 2013
Product data sheet
1. General description
The LPC11Cx2/Cx4 are an ARM Cortex-M0 based, low-cost 32-bit MCU family, designed
for 8/16-bit microcontroller applications, offering performance, low power, simple
instruction set and memory addressing together with reduced code size compared to
existing 8/16-bit architectures.
The LPC11Cx2/Cx4 operate at CPU frequencies of up to 50 MHz.
The peripheral complement of the LPC11Cx2/Cx4 includes 16/32 kB of flash memory,
8 kB of data memory, one C_CAN controller, one Fast-mode Plus I
2
C-bus interface, one
RS-485/EIA-485 UART, two SPI interfaces with SSP features, four general purpose
counter/timers, a 10-bit ADC, and up to 40 general purpose I/O pins.
On-chip C_CAN drivers and flash In-System Programming tools via C_CAN are included.
In addition, the LPC11C22 and LPC11C24 parts include an on-chip, high-speed CAN
transceiver.
2. Features and benefits
System:
ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.
ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).
Serial Wire Debug.
System tick timer.
Memory:
32 kB (LPC11Cx4) or 16 kB (LPC11Cx2) on-chip flash program memory.
8 kB SRAM data memory.
In-System Programming (ISP) and In-Application Programming (IAP) via on-chip
bootloader software.
Flash ISP commands can be issued via UART or C_CAN.
Digital peripherals:
General Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors.
40 GPIO pins on the LPC11C12/C14 parts; 36 GPIO pins on the LPC11C22/C24
parts.
GPIO pins can be used as edge and level sensitive interrupt sources.
High-current output driver (20 mA) on one pin.
High-current sink drivers (20 mA) on two I
2
C-bus pins in Fast-mode Plus.
Four general purpose counter/timers with a total of four capture inputs and 13
(LPC11C12/C14) or 12 (LPC11C22/C24) match outputs.
NXP Semiconductors
LPC11Cx2/Cx4
32-bit ARM Cortex-M0 microcontroller
Programmable WatchDog Timer (WDT).
Analog peripherals:
10-bit ADC with input multiplexing among 8 pins.
Serial interfaces:
UART with fractional baud rate generation, internal FIFO, and RS-485 support.
Two SPI controllers with SSP features and with FIFO and multi-protocol
capabilities.
I
2
C-bus interface supporting full I
2
C-bus specification and Fast-mode Plus with a
data rate of 1 Mbit/s with multiple address recognition and monitor mode.
C_CAN controller. On-chip C_CAN and CANopen drivers included.
On-chip, high-speed CAN transceiver (parts LPC11C22/C24 only).
Clock generation:
12 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used
as a system clock.
Crystal oscillator with an operating range of 1 MHz to 25 MHz.
Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz.
PLL allows CPU operation up to the maximum CPU rate without the need for a
high-frequency crystal. May be run from the system oscillator or the internal RC
oscillator.
Clock output function with divider that can reflect the system oscillator, IRC, CPU
clock, or the Watchdog clock.
Power control:
Integrated PMU (Power Management Unit) to minimize power consumption during
Sleep, Deep-sleep, and Deep power-down modes.
Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.
Processor wake-up from Deep-sleep mode via a dedicated start logic using 13 of
the GPIO pins.
Power-On Reset (POR).
Brownout detect with four separate thresholds for interrupt and forced reset.
Unique device serial number for identification.
Single 3.3 V power supply (1.8 V to 3.6 V).
Available as 48-pin LQFP package.
3. Applications
eMetering
Elevator systems
Industrial and sensor based networks
White goods
LPC11CX2_CX4
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3.1 — 15 May 2013
2 of 62
NXP Semiconductors
LPC11Cx2/Cx4
32-bit ARM Cortex-M0 microcontroller
4. Ordering information
Table 1.
Ordering information
Package
Name
LPC11C12FBD48/301
LPC11C14FBD48/301
LPC11C22FBD48/301
LPC11C24FBD48/301
LQFP48
LQFP48
LQFP48
LQFP48
Description
Version
LQFP48: plastic low profile quad flat package; 48 leads; body 7
7
SOT313-2
1.4 mm
LQFP48: plastic low profile quad flat package; 48 leads; body 7
7
SOT313-2
1.4 mm
LQFP48: plastic low profile quad flat package; 48 leads; body 7
7
SOT313-2
1.4 mm
LQFP48: plastic low profile quad flat package; 48 leads; body 7
7
SOT313-2
1.4 mm
Type number
4.1 Ordering options
Table 2.
Ordering options
Flash
Total UART
SRAM RS-485
I
2
C/
SPI C_CAN C_CAN with GPIO
Fast+
on-chip
pins
CAN
transceiver
1
1
1
1
2
2
2
2
1
1
1
1
no
no
yes
yes
40
40
36
36
ADC
Package
channels
Type number
LPC11C12FBD48/301
LPC11C14FBD48/301
LPC11C22FBD48/301
LPC11C24FBD48/301
16 kB
32 kB
16 kB
32 kB
8 kB
8 kB
8 kB
8 kB
1
1
1
1
8
8
8
8
LQFP48
LQFP48
LQFP48
LQFP48
LPC11CX2_CX4
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3.1 — 15 May 2013
3 of 62
NXP Semiconductors
LPC11Cx2/Cx4
32-bit ARM Cortex-M0 microcontroller
5. Block diagram
XTALIN
XTALOUT
RESET
SWD
LPC11Cx2/Cx4
IRC
TEST/DEBUG
INTERFACE
CLOCK
GENERATION,
POWER CONTROL,
SYSTEM
FUNCTIONS
clocks and
controls
FLASH
16/32 kB
slave
GPIO ports
PIO0/1/2/3
HIGH-SPEED
GPIO
slave
AHB-LITE BUS
SRAM
8 kB
slave
slave
CLKOUT
POR
ARM
CORTEX-M0
system bus
ROM
slave
AHB TO APB
BRIDGE
RXD
TXD
DTR, DSR, CTS,
DCD, RI, RTS
CT32B0_MAT[3:0]
CT32B0_CAP0
CT32B1_MAT[3:0]
CT32B1_CAP0
CT16B0_MAT[2:0]
CT16B0_CAP0
CT16B1_MAT[1:0]
(1)
CT16B1_CAP0
CAN_TXD
CAN_RXD
CANL, CANH
STB
V
CC
, VDD_CAN
UART
10-bit ADC
AD[7:0]
SCK0, SSEL0
MISO0, MOSI0
SCK1, SSEL1
MISO1, MOSI1
SCL
SDA
SPI0
32-bit COUNTER/TIMER 0
SPI1
32-bit COUNTER/TIMER 1
I
2
C-BUS
16-bit COUNTER/TIMER 0
16-bit COUNTER/TIMER 1
WDT
IOCONFIG
C_CAN (LPC11C12/C14)
SYSTEM CONTROL
C_CAN/
ON-CHIP TRANSCEIVER
(LPC11C22/C24)
PMU
002aaf265
(1) CT16B1_MAT0 not available on parts LPC11C22/C24.
Fig 1.
LPC11Cx2/Cx4 block diagram
LPC11CX2_CX4
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3.1 — 15 May 2013
4 of 62
NXP Semiconductors
LPC11Cx2/Cx4
32-bit ARM Cortex-M0 microcontroller
6. Pinning information
6.1 Pinning
40 PIO1_4/AD5/CT32B1_MAT3/WAKEUP
39 SWDIO/PIO1_3/AD4/CT32B1_MAT2
46 PIO1_6/RXD/CT32B0_MAT0
47 PIO1_7/TXD/CT32B0_MAT1
45 PIO1_5/RTS/CT32B0_CAP0
38 PIO2_3/RI/MOSI1
42 PIO1_11/AD7
43 PIO3_2/DCD
PIO2_6
PIO2_0/DTR/SSEL1
RESET/PIO0_0
PIO0_1/CLKOUT/CT32B0_MAT2
V
SS
XTALIN
XTALOUT
V
DD
PIO1_8/CT16B1_CAP0
1
2
3
4
5
6
7
8
9
37 PIO3_1/DSR
36 PIO3_0/DTR
35 R/PIO1_2/AD3/CT32B1_MAT1
34 R/PIO1_1/AD2/CT32B1_MAT0
33 R/PIO1_0/AD1/CT32B1_CAP0
32 R/PIO0_11/AD0/CT32B0_MAT3
31 PIO2_11/SCK0
30 PIO1_10/AD6/CT16B1_MAT1
29 SWCLK/PIO0_10/SCK0/CT16B0_MAT2
28 PIO0_9/MOSI0/CT16B0_MAT1
27 PIO0_8/MISO0/CT16B0_MAT0
26 PIO2_2/DCD/MISO1
25 PIO2_10
PIO2_9 24
002aaf266
48 PIO3_3/RI
44 V
DD
LPC11C12FBD48/301
LPC11C14FBD48/301
PIO0_2/SSEL0/CT16B0_CAP0 10
PIO2_7 11
PIO2_8 12
PIO2_1/DSR/SCK1 13
PIO0_3 14
PIO0_4/SCL 15
PIO0_5/SDA 16
PIO1_9/CT16B1_MAT0 17
PIO2_4 18
CAN_RXD 19
CAN_TXD 20
PIO2_5 21
PIO0_6/SCK0 22
PIO0_7/CTS 23
Fig 2.
Pin configuration (LPC11C12/C14)
LPC11CX2_CX4
All information provided in this document is subject to legal disclaimers.
41 V
SS
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3.1 — 15 May 2013
5 of 62
京公网安备 11010802033920号
EEWORLD
