LFSCM3GA25EP1-5FFN1020C datasheet, PDF

Datasheet> All Categories > semiconductor> Other integrated circuit (IC)> LFSCM3GA25EP1-5FFN1020C

LFSCM3GA25EP1-5FFN1020C: Descriptionfpga - field programmable gate array 25.4K luts maco serd ES 1.2V -5 spd; Categorysemiconductor Other integrated circuit (IC); File Size4MB，344 Pages; ManufacturerAll Sensors; Environmental Compliance

Download Datasheet Parametric View All

LFSCM3GA25EP1-5FFN1020C Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	LFSCM3GA25EP1-5FFN1020C	-	-	View	Buy Now

LFSCM3GA25EP1-5FFN1020C Overview

fpga - field programmable gate array 25.4K luts maco serd ES 1.2V -5 spd

LFSCM3GA25EP1-5FFN1020C Parametric

Parameter Name	Attribute value
Manufacture	Lattice
Product Category	FPGA - Field Programmable Gate Array
Produc	SCM
Number of Logic Elements	25000
Number of Logic Array Blocks - LABs	3125
Total Memory	2.33 Mbi
Number of I/Os	476
Operating Supply Voltage	1.2 V
Maximum Operating Temperature	+ 85 C
Mounting Style	SMD/SMT
Package / Case	OFCBGA-1020
Distributed RAM	410 kbi
Embedded Block RAM - EBR	1.92 Mbi
Maximum Operating Frequency	700 MHz
Minimum Operating Temperature	0 C
Packaging	Tray
Factory Pack Quantity	24

Preview

Download Datasheet

View All

LatticeSC/M Family flexiPCS Data Sheet

DS1005 Version 02.0, June 2011

Table of Contents

LatticeSC/M Family flexiPCS Data Sheet

June 2011

Introduction to flexiPCS ..................................................................................................................... 1-1

flexiPCS™ Features........................................................................................................................................... 1-1

flexiPCS Introduction.......................................................................................................................................... 1-2

Architecture Overview ........................................................................................................................................ 1-2

flexiPCS Quad........................................................................................................................................... 1-2

flexiPCS Channel ...................................................................................................................................... 1-3

Per Channel PCS/FPGA Interface Ports................................................................................................... 1-4

Using this Data Sheet ............................................................................................................................... 1-7

SERDES Functionality/Electrical & Timing ...................................................................................... 2-1

Introduction ........................................................................................................................................................ 2-1

LatticeSC flexiPCS Quad Module ............................................................................................................. 2-1

Quad and Channel Option Control..................................................................................................................... 2-1

Register Map Addressing.......................................................................................................................... 2-1

Auto-Configuration .................................................................................................................................... 2-3

SERDES Functionality ....................................................................................................................................... 2-4

SERDES Port Description.................................................................................................................................. 2-6

SERDES Functionality Detailed Description ...................................................................................................... 2-8

SERDES Powerup .................................................................................................................................... 2-8

Clocks & Resets........................................................................................................................................ 2-9

Rate Mode Registers .............................................................................................................................. 2-12

Locked Reference and Transmit Clocks ................................................................................................. 2-17

Transmit Clocks ...................................................................................................................................... 2-18

Receive Clocks ....................................................................................................................................... 2-18

Transmit Data.......................................................................................................................................... 2-22

Transmit Data Skew................................................................................................................................ 2-23

Receive Data........................................................................................................................................... 2-23

Low Speed SERDES Receiver Operation ....................................................................................................... 2-26

Status Interrupt Registers ................................................................................................................................ 2-27

Receive CDR Loss of Lock Interrupt Usage .................................................................................................... 2-27

flexiPCS Reset Sequences .............................................................................................................................. 2-28

flexiPCS Power Down Control Signals............................................................................................................. 2-29

SERDES Electrical & Timing Characteristics................................................................................................... 2-31

SERDES Performance............................................................................................................................ 2-31

SERDES High Speed Data Transmitter.................................................................................................. 2-31

SERDES High Speed Data Receiver...................................................................................................... 2-33

Interfacing to Reference Clock CML Buffers.................................................................................................... 2-36

SERDES Power ............................................................................................................................................... 2-37

SERDES Power Supply Sequencing Requirements............................................................................... 2-38

SERDES Power Supply Requirements............................................................................................................ 2-38

SERDES Power Supply Package Requirements............................................................................................. 2-38

Power-Down/Power-Up Specification .............................................................................................................. 2-38

8-bit and 10-bit SERDES Only Modes ............................................................................................... 3-1

Introduction ........................................................................................................................................................ 3-1

LatticeSC flexiPCS Quad Module ............................................................................................................. 3-1

Quad and Channel Option Control..................................................................................................................... 3-1

Register Map Addressing.......................................................................................................................... 3-2

Auto-Configuration .................................................................................................................................... 3-3

8-bit SERDES Only Register Settings....................................................................................................... 3-4

or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

www.latticesemi.com

Lattice Semiconductor

Table of Contents

LatticeSC/M Family flexiPCS Data Sheet

8-bit SERDES Only Auto-Configuration Example ..................................................................................... 3-4

10-bit SERDES Only Register Settings..................................................................................................... 3-5

10-bit SERDES Only Auto-Configuration Example ................................................................................... 3-6

8-bit SERDES Only Mode .................................................................................................................................. 3-6

8-bit SERDES Only Mode Pin Description......................................................................................................... 3-8

8-bit SERDES Only Mode Detailed Description................................................................................................. 3-9

Clocks & Resets........................................................................................................................................ 3-9

Transmit Data.......................................................................................................................................... 3-11

Receive Data........................................................................................................................................... 3-14

Control & Status ...................................................................................................................................... 3-16

10-bit SERDES Only Mode .............................................................................................................................. 3-16

10-bit SERDES Only Mode Pin Description..................................................................................................... 3-18

10-bit SERDES Only Mode Detailed Description............................................................................................. 3-19

Clocks & Resets...................................................................................................................................... 3-19

Transmit Data.......................................................................................................................................... 3-21

Receive Data........................................................................................................................................... 3-24

Control & Status ...................................................................................................................................... 3-26

Generic 8b10b Mode ........................................................................................................................... 4-1

Introduction ........................................................................................................................................................ 4-1

LatticeSC flexiPCS Quad Module ............................................................................................................. 4-1

Quad and Channel Option Control..................................................................................................................... 4-1

Register Map Addressing.......................................................................................................................... 4-2

Auto-Configuration .................................................................................................................................... 4-3

Generic 8b10b Register Settings .............................................................................................................. 4-4

Generic 8b10b Auto-Configuration Example............................................................................................. 4-5

Generic 8b10b Mode.......................................................................................................................................... 4-6

Generic 8b10b Mode Pin Description ................................................................................................................ 4-8

Generic 8b10b Mode Detailed Description ...................................................................................................... 4-10

Clocks & Resets...................................................................................................................................... 4-10

Transmit Data.......................................................................................................................................... 4-12

Receive Data........................................................................................................................................... 4-16

Control & Status ...................................................................................................................................... 4-32

Status Interrupt Registers ....................................................................................................................... 4-33

Gigabit Ethernet Mode ....................................................................................................................... 5-1

Introduction ........................................................................................................................................................ 5-1

LatticeSC flexiPCS Quad Module ............................................................................................................. 5-1

Quad and Channel Option Control..................................................................................................................... 5-2

Register Map Addressing.......................................................................................................................... 5-2

Auto-Configuration .................................................................................................................................... 5-4

Gigabit Ethernet Register Settings............................................................................................................ 5-4

Gigabit Ethernet Auto-Configuration ......................................................................................................... 5-5

Gigabit Ethernet Mode ....................................................................................................................................... 5-6

Gigabit Ethernet Mode Pin Description .............................................................................................................. 5-7

Gigabit Ethernet Mode Detailed Description ...................................................................................................... 5-9

Clocks & Resets........................................................................................................................................ 5-9

Transmit Data.......................................................................................................................................... 5-10

Receive Data........................................................................................................................................... 5-13

Auto-Negotiation ..................................................................................................................................... 5-22

Control & Status ...................................................................................................................................... 5-25

Status Interrupt Registers ....................................................................................................................... 5-26

Fibre Channel Mode ........................................................................................................................... 6-1

Introduction ........................................................................................................................................................ 6-1

LatticeSC flexiPCS Quad Module ............................................................................................................. 6-1

Quad and Channel Option Control..................................................................................................................... 6-2

Lattice Semiconductor

Table of Contents

LatticeSC/M Family flexiPCS Data Sheet

Register Map Addressing.......................................................................................................................... 6-2

Auto-Configuration .................................................................................................................................... 6-4

Fibre Channel Register Settings ............................................................................................................... 6-4

Fibre Channel Auto-Configuration Example.............................................................................................. 6-5

Fibre Channel Mode........................................................................................................................................... 6-6

Fibre Channel Mode Pin Description ................................................................................................................. 6-7

Fibre Channel Mode Detailed Description ....................................................................................................... 6-10

Clocks & Resets...................................................................................................................................... 6-10

Transmit Data.......................................................................................................................................... 6-12

Receive Data........................................................................................................................................... 6-14

Control & Status ...................................................................................................................................... 6-23

Status Interrupt Registers ....................................................................................................................... 6-23

XAUI Mode ........................................................................................................................................... 7-1

Introduction ........................................................................................................................................................ 7-1

LatticeSC flexiPCS Quad Module ............................................................................................................. 7-1

Quad and Channel Option Control..................................................................................................................... 7-1

Register Map Addressing.......................................................................................................................... 7-2

Auto-Configuration .................................................................................................................................... 7-3

XAUI Register Settings ............................................................................................................................. 7-4

XAUI Auto-Configuration Example............................................................................................................ 7-5

XAUI Mode......................................................................................................................................................... 7-6

XAUI Mode Pin Descriptions.............................................................................................................................. 7-8

XAUI Mode Detailed Description........................................................................................................................ 7-9

Clocks & Resets........................................................................................................................................ 7-9

Transmit Data.......................................................................................................................................... 7-11

Receive Data........................................................................................................................................... 7-15

Control & Status ...................................................................................................................................... 7-25

Status Interrupt Registers ....................................................................................................................... 7-26

PCI Express Mode .............................................................................................................................. 8-1

Introduction ........................................................................................................................................................ 8-1

LatticeSC flexiPCS Quad Module ............................................................................................................. 8-1

Quad and Channel Option Control..................................................................................................................... 8-2

Register Map Addressing.......................................................................................................................... 8-2

Auto-Configuration .................................................................................................................................... 8-4

PCI Express Register Settings.................................................................................................................. 8-5

x4 PCI Express Auto-Configuration Example ........................................................................................... 8-6

PCI Express Mode ............................................................................................................................................. 8-7

PCI Express Mode Pin Description .................................................................................................................... 8-9

PCI Express Mode Detailed Description .......................................................................................................... 8-11

Clocks & Resets...................................................................................................................................... 8-11

Transmit Data.......................................................................................................................................... 8-12

Receive Data........................................................................................................................................... 8-16

Control & Status ...................................................................................................................................... 8-21

x2 PCI Express Operation....................................................................................................................... 8-22

x4 PCI Express Operation................................................................................................................................ 8-26

x4 PCI Express Operation Pin Description ...................................................................................................... 8-28

x4 PCI Express Operation Detailed Description .............................................................................................. 8-31

Clocks & Resets...................................................................................................................................... 8-31

Transmit Data.......................................................................................................................................... 8-31

Receive Data........................................................................................................................................... 8-31

x8 PCI Express Operation................................................................................................................................ 8-35

Control & Status ...................................................................................................................................... 8-37

Status Interrupt Registers ....................................................................................................................... 8-38

iii

Lattice Semiconductor

Table of Contents

LatticeSC/M Family flexiPCS Data Sheet

Serial RapidIO Mode ........................................................................................................................... 9-1

Introduction ........................................................................................................................................................ 9-1

LatticeSC flexiPCS Quad Module ............................................................................................................. 9-1

Quad and Channel Option Control..................................................................................................................... 9-2

Register Map Addressing.......................................................................................................................... 9-2

Auto-Configuration .................................................................................................................................... 9-3

Serial RapidIO Register Settings .............................................................................................................. 9-4

Serial RapidIO Auto-Configuration Example............................................................................................. 9-5

Serial RapidIO Mode.......................................................................................................................................... 9-6

1x Serial RapidIO Mode Pin Descriptions .......................................................................................................... 9-8

Serial RapidIO Mode Detailed Description......................................................................................................... 9-9

Clocks & Resets........................................................................................................................................ 9-9

Transmit Data.......................................................................................................................................... 9-12

Receive Data........................................................................................................................................... 9-15

Control & Status ...................................................................................................................................... 9-19

4x Serial RapidIO Operation ............................................................................................................................ 9-20

4x Serial RapidIO Operation Pin Description ................................................................................................... 9-22

4x Serial RapidIO Operation Detailed Description ........................................................................................... 9-23

Clocks & Resets...................................................................................................................................... 9-23

Transmit Data.......................................................................................................................................... 9-24

Receive Data........................................................................................................................................... 9-27

Control & Status ...................................................................................................................................... 9-32

Status Interrupt Registers ....................................................................................................................... 9-33

SONET Mode ..................................................................................................................................... 10-1

Introduction ...................................................................................................................................................... 10-1

LatticeSC flexiPCS Quad Module ........................................................................................................... 10-1

Quad and Channel Option Control................................................................................................................... 10-1

Register Map Addressing........................................................................................................................ 10-2

Auto-Configuration .................................................................................................................................. 10-3

SONET Register Settings ....................................................................................................................... 10-4

SONET Auto-Configuration..................................................................................................................... 10-5

SONET Mode................................................................................................................................................... 10-6

SONET Mode Pin Description.......................................................................................................................... 10-8

SONET Mode Detailed Description.................................................................................................................. 10-9

Clocks & Resets...................................................................................................................................... 10-9

Transmit Data........................................................................................................................................ 10-11

Receive Data......................................................................................................................................... 10-15

Control & Status .................................................................................................................................... 10-25

Status Interrupt Registers ..................................................................................................................... 10-26

Multi-Channel Alignment ................................................................................................................. 11-1

Introduction ...................................................................................................................................................... 11-1

Supported Protocols......................................................................................................................................... 11-2

Alignment Within A Quad ................................................................................................................................. 11-4

Alignment Between Quads............................................................................................................................. 11-13

Alignment Between Two Devices................................................................................................................... 11-19

Synchronization of Aligned Channels Across Two Devices.................................................................. 11-20

Status Interrupt Registers ..................................................................................................................... 11-21

flexiPCS Testing .............................................................................................................................. 12-1

Introduction ...................................................................................................................................................... 12-1

Near-End Loopback Modes ............................................................................................................................. 12-1

Far-End Loopback Modes................................................................................................................................ 12-2

PRBS Generator and Checker......................................................................................................................... 12-4

Memory Map ..................................................................................................................................... 13-1

LatticeSC flexiPCS Memory Map..................................................................................................................... 13-1

Recommended Resources

Voltage stabilization control circuit in power circuit

Transistor type water level automatic control circuit 3 (fill-in type) a

DM2-2500 type demagnetization switch control circuit

Samsung CE959 microwave oven circuit diagram

Positive 5V precision reference source circuit

Satellite TV receiver video processing circuit

I encountered a problem when porting the ax88796 network card driver to vivi. I hope the experts can help me! ! !: ->base; unsigned char isr; //write 0x22 to the CR MAC command register , to make the chip start working now DP_OUT(base, DP_CR, DP_CR_NODMA | DP_CR_PAGE0 | DP_CR_START); //read the ISR--interrupt stat...; almax12 Embedded System

Initialization of string pointers: If you want to initialize a string, there are two ways to write it: 1: char *p = "hello"; 2: char *p; p = "hello"; Are these two ways wrong? Are there any differences? Tan Haoqiang C Programming p238 ...; louis0711 Embedded System

Zigbeez: How many companies have mature solutions in smart home?: I want to build a smart home system using Zigbee technology. Are there many manufacturers like this? Which ones are good at it?...; sciencefor RF/Wirelessly

Help with FPGA and 2812 communication issues: I need help with the communication problem between two controllers. Explanation: Use XINTF for communication, FPGA sends 16-bit numbers to dsp data bus, dsp reads the data on the data bus through peri...; leejian113 FPGA/CPLD

Verilog problem with keypress: module key(clk,key_in,key_out); input clk; input[3:0]key_in;//key inputoutput[3:0]key_out; reg[3:0]dout1,dout2,dout3; reg[3:0]a; reg i; //assign key_out=a; always@(posedge clk)//key debounce begin dou...; hjl240 FPGA/CPLD

The task scheduling cycle of DM8168 is problematic. The simplest task will also intermittently have a scheduling cycle of about 335ms.: After the DM8168 system is started, only one main task is created, and only the following simple loop is performed in it, which is to continuously print the current execution time interval. Statistics...; yelo DSP and ARM Processors

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components